ARM r1p3 To use the Debug ID Register, read CP14 c0 with, Debug ROM Address Register functions

Debug

To use the Debug ID Register, read CP14 c0 with:

MRC p14, 0, <Rd>, c0, c0, 0 ; Read Debug ID Register

11.4.3CP14 c0, Debug ROM Address Register

The Debug ROM Address Register is a read-only register that returns a 32-bit Debug ROM Address Register value. This is the address that indicates where in memory a debug monitor can locate the debug bus ROM specified by the CoreSight™ multiprocessor trace and debug architecture. This ROM holds information about all the components in the debug bus. You can configure the address read in this register during integration using the DBGROMADDR[31:12] and DBGROMADDRV inputs. DBGROMADDRV must be tied off to 1 if DBGROMADDR[31:12] is tied off to a valid value.

The Debug ROM Address Register is:

•in CP14 c0, sub-register c1

•a 32 bit read-only register

•accessible in User and Privileged modes.

Figure 11-3shows the bit arrangement of the Debug ROM address register.

31 12 11 2 1 0

Debug bus ROM physical address

Reserved

Valid bits

Figure 11-3 Debug ROM Address Register format

Table 11-8shows how the bit values correspond with the Debug ROM Address Register functions.

		Table 11-8 Debug ROM Address Register functions
Bits	Field	Function
[31:12]	Debug bus	Indicates bits [31:12] of the debug bus ROM address.
	ROM address.
[11: 2]	Reserved	SBZ.
[1:0]	Valid bits	Indicates that the ROM address is valid.
		Reads b11 if DBGROMADDRV is set to 1, otherwise reads b00. DBGROMADDRV must
		be set to 1 if DBGROMADDR[31:12] is set to a valid value.

To use the Debug ROM Address Register, read CP14 c0 with:

MRC p14, 0, <Rd>, c1, c0, 0 ; Read Debug ROM Address Register

11.4.4CP14 c0, Debug Self Address Offset Register

The Debug Self Address Offset Register is a read-only register that returns a 32-bit offset value from the Debug ROM Address Register to the address of the processor debug registers. You can configure the address read in this register during integration using the DBGSELFADDR[31:12] and DBGSELFADDRV inputs. DBGSELFADDRV must be tied off to 1 if DBGSELFADDR[31:12] is tied off to a valid value.

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