ARM R4F See Should Be One, See Should Be Zero, See Boundary scan chain, See Cache set, Results

	Glossary
Reserved	A field in a control register or instruction format is reserved if the field is to be defined by the
	implementation, or produces Unpredictable results if the contents of the field are not zero. These
	fields are reserved for use in future extensions of the architecture or are
	implementation-specific. All reserved bits not used by the implementation must be written as 0
	and are to be read as 0.
Rounding mode	The IEEE 754 standard requires all calculations to be performed as if to an infinite precision.
	For example, a multiply of two single-precision values must accurately calculate the significand
	to twice the number of bits of the significand. To represent this value in the destination
	precision, rounding of the significand is often required. The IEEE 754 standard specifies four
	rounding modes.
	In round-to-nearest mode, the result is rounded at the halfway point, with the tie case rounding
	up if it would clear the least significant bit of the significand, making it even.
	Round-towards-zero mode chops any bits to the right of the significand, always rounding down,
	and is used by the C, C++, and Java languages in integer conversions.
	Round-towards-plus-infinity mode and round-towards-minus-infinity mode are used in interval
	arithmetic.

Saved Program Status Register (SPSR)

The register that holds the CPSR of the task immediately before the exception occurred that caused the switch to the current mode.

SBO	See Should Be One.
SBZ	See Should Be Zero.
Scan chain	See Boundary scan chain.
Set	See Cache set.
Set-associative cache	In a set-associative cache, lines can only be placed in the cache in locations that correspond to
	the modulo division of the memory address by the number of sets. If there are n ways in a cache,
	the cache is termed n-way set-associative. The set-associativity can be any number greater than
	or equal to 1 and is not restricted to being a power of two.
Short vector operation	An operation involving more than one destination register and perhaps more than one source
	register in the generation of the result for each destination.
Should Be One (SBO)	Should be written as 1 (or all 1s for bit fields) by software. Writing a 0 produces Unpredictable
	results.
Should Be Zero (SBZ)	Should be written as 0 (or all 0s for bit fields) by software. Writing a 1 produces Unpredictable
	results.

Should Be Zero or Preserved (SBZP)

Should be written as 0 (or all 0s for bit fields) by software, or preserved by writing the same value back that has been previously read from the same field on the same processor.

Significand	The component of a binary floating-point number that consists of an explicit or implicit leading
	bit to the left of the implied binary point and a fraction field to the right.
SPSR	See Saved Program Status Register

ARM DDI 0363E	Copyright © 2009 ARM Limited. All rights reserved.	Glossary-12
ID013010	Non-Confidential, Unrestricted Access