ARM r1p3, R4F See also Advanced High-performance Bus, See Advanced High-performance Bus, State

Glossary

Advanced High-performance Bus (AHB)

The AMBA Advanced High-performance Bus system connects embedded processors such as an ARM core to high-performance peripherals, DMA controllers, on-chip memory, and interfaces. It is a high-speed, high-bandwidth bus that supports multi-master bus management to maximize system performance.

See also Advanced Microcontroller Bus Architecture.

Advanced Microcontroller Bus Architecture (AMBA)

AMBA is the ARM open standard for multi-master on-chip buses, capable of running with multiple masters and slaves. It is an on-chip bus specification that details a strategy for the interconnection and management of functional blocks that make up a System-on-Chip(SoC). It aids in the development of embedded processors with one or more CPUs or signal processors and multiple peripherals. AMBA complements a reusable design methodology by defining a common backbone for SoC modules. AHB, APB, and AXI conform to this standard.

Advanced Peripheral Bus (APB)

The AMBA Advanced Peripheral Bus is a simpler bus protocol than AHB. It is designed for use with ancillary or general-purpose peripherals such as timers, interrupt controllers, UARTs, and I/O ports. Connection to the main system bus is through a system-to-peripheral bus bridge that helps to reduce system power consumption.

	See also Advanced High-performance Bus.
AHB	See Advanced High-performance Bus.
Aligned	A data item stored at an address that is divisible by the number of bytes that defines the data size
	is said to be aligned. Aligned words and halfwords have addresses that are divisible by four and
	two respectively. The terms word-aligned and halfword-aligned therefore stipulate addresses
	that are divisible by four and two respectively.
AMBA	See Advanced Microcontroller Bus Architecture.
APB	See Advanced Peripheral Bus.
Application Specific Integrated Circuit (ASIC)
	An integrated circuit that has been designed to perform a specific application function. It can be
	custom-built or mass-produced.
Architecture	The organization of hardware and/or software that characterizes a processor and its attached
	components, and enables devices with similar characteristics to be grouped together when
	describing their behavior, for example, Harvard architecture, instruction set architecture,
	ARMv6 architecture.
ARM instruction	A word that specifies an operation for an ARM processor to perform. ARM instructions must
	be word-aligned.
ARM state	A processor that is executing ARM (32-bit) word-aligned instructions is operating in ARM
	state.
ASIC	See Application Specific Integrated Circuit.
AXI	See Advanced eXstensible Interface.

AXI channel order and interfaces

The block diagram shows:

•the order in which AXI channel signals are described

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