ARM R4F, r1p3 manual C0, Instruction Set Attributes Register 2, ISAR2, Ite

System Control Coprocessor

Table 4-15shows how the bit values correspond with the Instruction Set Attributes Register 1 functions.

Table 4-15 Instruction Set Attributes Register 1 bit functions

Bits Field Function

[31:28] Jazelle instructions

Indicates support for Jazelle instructions.

0x1, the processor supports:

•BXJ instruction

•J bit in PSRs.

For more information see Program status registers on page 2-10and Acceleration of execution environments on page 2-27.

[27:24] Interworking instructions

Indicates support for interworking instructions.

0x3, the processor supports:

•BX, and T bit in PSRs

•BLX, and PC loads have BX behavior.

•Data-processing instructions in the ARM instruction set with the PC as the destination and the S bit clear have BX-like behavior.

[23:20] Immediate instructions

Indicates support for immediate instructions.

0x1, the processor supports:

•the MOVT instruction

•MOV instruction encodings with 16-bit immediates

•Thumb ADD and SUB instructions with 12-bit immediates.

[19:16]	ITE	Indicates support for if then instructions.
	instructions	0x1, the processor supports IT instructions.
[15:12]	Extend	Indicates support for sign or zero extend instructions.
	instructions	0x2, the processor supports:
		•	SXTB, SXTB16, SXTH, UXTB, UXTB16, and UXTH
		•	SXTAB, SXTAB16, SXTAH, UXTAB, UXTAB16, and UXTAH.
[11:8]	Exception 2	Indicates support for exception 2 instructions.
	instructions	0x1, the processor supports RFE, SRS, and CPS.
[7:4]	Exception 1	Indicates support for exception 1 instructions.
	instructions	0x1, the processor supports LDM (exception return), LDM (user registers), and STM (user
		registers).
[3:0]	Endian	Indicates support for endianness control instructions.
	instructions	0x1, the processor supports SETEND and E bit in PSRs.

To access the Instruction Set Attributes Register 1 read CP15 with:

MRC p15, 0, <Rd>, c0, c2, 1 ; Read Instruction Set Attributes Register 1

c0, Instruction Set Attributes Register 2, ISAR2

The Instruction Set Attributes Register 2 provides information about the instruction set that the processor supports beyond the basic set.

The Instruction Set Attributes Register 2 is:

•a read-only register

•accessible in Privileged mode only.

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