System Control Coprocessor
ARM DDI 0363E Copyright ©2009 ARM Limited. All rights reserved. 4-4
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4.1.2 System control and configuration
The system control and configuration registers provide overall management of:
• memory functionality
• interrupt behavior
• exception handling
• program flow prediction
• coprocessor access rights for CP0-CP13, including the VFP, CP10-11.
The system control and configuration registers also provide the processor ID and information
on configured options.
The system control and configuration registers consist of 18 read-only registers and seven
read/write registers. Figure 4-1 shows the arrangement of registers in this functional group.
Figure 4-1 System control and configuration registers
Some of the functionality depends on how you set external signals at reset.
System control and configuration behaves in three ways:
• as a set of flags or enables for specific functionality
• as a set of numbers, with values that indicate system functionality
• as a set of addresses for processes in memory.
TCM control and
configuration
TCM Status c0, TCM Type Register on page4-16
Region c9, BTCM Region Register on page4-57
c9, TCM Selection Register on page4-59
System performance
monitoring
Performance monitoring Chapter6 Events and Performance Monitor
Validation System validation Validation Registers on page4-62
a. Known as the ID Code Register on previous designs. Returns the device ID code.
Table4-1 System control coprocessor register functions (continued)
Function Register/operation Reference to description
CRn
c1
Coprocessor Access Register
Auxiliary Control Register
System Control Register
1
0c00
c13 0
c0
Context ID Register
0
Opcode_2CRmOpcode_1
c0 Main ID Register
0
c00
Debug Feature Register 0
Auxiliary Feature Register 0
{0, 1} Processor Feature Registers 0, 1
Multiprocessor ID Register
Memory Model Feature Registers 0 - 3
Instruction Set Attributes Registers 0 - 5
c1
5
2
3
{4–7}
{0-5}
c2
2
Slave Port Control Register
0
c11 0 c0
Write-only Accessible in User mode
Read-only Read/write
FCSE PID Register
1
c15 0
0 c0
c2 0
1
Secondary Auxiliary Control Register
Build Options Register 1
Build Options Register 2