ARM R4F, r1p3 manual 18shows the timing parameters for the FPU output signals, Fpidc

AC Characteristics

Table 15-17 TCM interface output ports timing parameters (continued)

Output delay	Output delay	Signal name
minimum	maximum
Clock uncertainty	45%	ATCADDRPTY
Clock uncertainty	45%	B0TCEN0
Clock uncertainty	45%	B0TCEN1
Clock uncertainty	45%	B0TCADDR[22:3]
Clock uncertainty	45%	B0TCBYTEWR[7:0]
Clock uncertainty	45%	B0TCSEQ
Clock uncertainty	45%	B0TCDATAOUT[63:0]
Clock uncertainty	45%	B0TCPARITYOUT[13:0]
Clock uncertainty	45%	B0TCACCTYPE[2:0]
Clock uncertainty	45%	B0TCWE
Clock uncertainty	45%	B0TCADDRPTY
Clock uncertainty	45%	B1TCEN0
Clock uncertainty	45%	B1TCEN1
Clock uncertainty	45%	B1TCADDR[23:0]
Clock uncertainty	45%	B1TCBYTEWR[7:0]
Clock uncertainty	45%	B1TCSEQ
Clock uncertainty	45%	B1TCDATAOUT[63:0]
Clock uncertainty	45%	B1TCPARITYOUT[13:0]
Clock uncertainty	45%	B1TCACCTYPE[2:0]
Clock uncertainty	45%	B1TCWE
Clock uncertainty	45%	B1TCADDRPTY

Table 15-18shows the timing parameters for the FPU output signals.

Table 15-18 FPU output port timing parameters

Output delay	Output delay	Signal name
minimum	maximum
Clock uncertainty	60%	FPIXC
Clock uncertainty	60%	FPOFC
Clock uncertainty	60%	FPUFC
Clock uncertainty	60%	FPIOC
Clock uncertainty	60%	FPDZC
Clock uncertainty	60%	FPIDC

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