ARM r1p3, R4, R4F A.9 ETM interface signals

Processor Signal Descriptions
ARM DDI 0363E Copyright ©2009 ARM Limited. All rights reserved. A-19
ID013010 Non-Confidential, Unrestricted Access
A.9 ETM interface signals
TableA-14 shows the ETM interface signals.
TableA-14 ETM interface signals
Signal Direction Clocking Description
ETMICTL[13:0] Output CLKIN ETM instruction control bus
ETMIA[31:1] Output CLKIN ETM instruction address
ETMDCTL[11:0] Output CLKIN ETM data control bus
ETMDA[31:0] Output CLKIN ETM data address
ETMDD[63:0] Output CLKIN ETM data-data
ETMCID[31:0] Output CLKIN Current value of processor CID register
ETMWFIPENDING Output CLKIN Core is attempting to enter WFI state
EVNTBUS[46:0] Output CLKIN Performance monitor unit output
ETMPWRUP Input CLKIN Power up ETM interface
nETMWFIREADY Input CLKIN ETM FIFO is empty, core can enter WFI state
ETMEXTOUT[1:0] Input CLKIN ETM detected events