Fields in the Peripheral Identification Registers

Debug

Table 11-31shows the offset value, register number, and description that are associated with each Peripheral Identification Register.

Table 11-31 Peripheral Identification Registers

Offset (hex)	Register number	Function

0xFD0	1012	Peripheral Identification Register 4

0xFD4	1013	Reserved

0xFD8	1014	Reserved

0xFDC	1015	Reserved

0xFE0	1016	Peripheral Identification Register 0

0xFE4	1017	Peripheral Identification Register 1

0xFE8	1018	Peripheral Identification Register 2

0xFEC	1019	Peripheral Identification Register 3

Table 11-32shows fields that are in the Peripheral Identification Registers.

		Table 11-32 Fields in the Peripheral Identification Registers

Field	Size	Description

4KB Count	4 bits	Indicates the Log2 of the number of 4KB blocks occupied by the debug device. The processor
		debug registers occupy a single 4KB block, therefore this field is always 0x0.

JEP106	4+7 bits	Identifies the designer of the processor. This field consists of a 4-bit continuation code and a
Identity		7-bit identity code. Because the processor is designed by ARM, the continuation code is 0x4
Code		and the identity code is 0x3B. For more information see JEP106M, Standard Manufacture’s
		Identification Code.

Part number	12 bits	Indicates the part number of the processor. The part number for the processor is 0xC14.

Revision	4 bits	Indicates the major and minor revision of the product. The major revision contains
		functionality changes and the minor revision contains bug fixes for the product. The revision
		number starts at 0x0 and increments by 1 at both major and minor revisions. See Product
		revision information on page 1-24for details of the value of this field.

RevAnd	4 bits	Indicates the manufacturer revision number. This number starts at 0x0 and increments by the
		integrated circuit manufacturer on metal fixes. For the Cortex-R4 processor, the initial value is
		0x0 but this value can be changed by the manufacturer.

Customer	4 bits	Indicates an endorsed modification to the device. On this processor the value is always 0x0.
modified

Table 11-33shows how the bit values correspond with the Peripheral ID Register 0 functions.

		Table 11-33 Peripheral ID Register 0 functions

Bits	Value	Description

[31:8]	-	Reserved

[7:0]	0x14	Indicates bits [7:0] of the Part number for the processor

ARM DDI 0363E	Copyright © 2009 ARM Limited. All rights reserved.	11-36
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ARM r1p3, R4F manual Fields in the Peripheral Identification Registers, Field Size Description