ARM r1p3, R4, R4F A.2 Global signals

Processor Signal Descriptions
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A.2 Global signals
TableA-1 shows the processor global signals.
The free clock is ungated, with minimal insertion delay, because it clocks the clock gating
circuits. Therefore, you must ensure that incoming clocks are balanced with the free clock.
TableA-1 Global signals
Signal Direction Clocking Description
FREECLKIN Input - Free version of the core clock.
CLKIN Input - Core clock.
CLKIN2 Input - Core clock, in phase with DUALCKLIN, for configurations
with dual-redundant core.a
nRESET Input Any Core reset.
nSYSPORESET Input Any System power on reset.
nCPUHALT Input Any Processor halt after reset.
DBGNOCLKSTOP Input Any Processor does not stop the clocks when entering WFI state.a
DUALCLKIN Input - Clock for second, redundant, core.a
DUALCLKIN2 Input - Clock for second, redundant, core, in phase with CLKIN.a
STANDBYWFI Output FREECLKIN Indicates that the processor is in Standby mode and the
processor clock is stopped. You can use this signal for TCMs
RAM clock gating.
a. Not available in r0px revisions of the processor.