APPENDIX: I/O MAP
Register name | Address | Bit | Name | Function |
| Setting |
| Init. | R/W | Remarks | ||
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LCDC | 039FFFD | D7 | VRAMAR | VRAM area select | 1 | Area 8 | 0 |
| Area 7 | 0 | R/W |
|
system control | (B) | D6 | VRAMWT2 | VRAM wait control |
|
| 0 | R/W |
| |||
register |
| D5 | VRAMWT1 | (number of wait cycles for SRAM) |
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| 0 |
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| D4 | VRAMWT0 |
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| 0 |
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| D3 | EDMAEN | External DMA enable | 1 | Enabled | 0 |
| Disabled | 0 | R/W |
|
|
| D2 | BREQEN | External | 1 | Enabled | 0 |
| Disabled | 0 | R/W |
|
|
| D1 | LCDCST | A0/BSL select | 1 | BSL | 0 |
| A0 | 0 | R/W |
|
|
| D0 | LCDCEC | Big/little endian select | 1 | Big endian | 0 |
| Little endian | 0 | R/W |
|
EPSON | S1C33L03 FUNCTION PART |