Intel 386 manual Chapter

			TABLE OF CONTENTS
8.5 BASIC I/O EXAMPLES					Page
				8-12
8.5.1	8274 Serial Controller		;		8-12
8.5.2 82380 Programmable Interrupt Controller					8-13
8.5.2.1 CASCADED INTERRUPT CONTROLLERS TO THE 82380 PIC					8-13
8.5.3	8259A Interrupt Controller				8-14
8.5.3.1 SINGLE INTERRUPT CONTROLLER					8-14
8.5.3.2 CASCADED INTERRUPT CONTROLLERS					8-15
8.5.3.3 HANDLING MORE THAN 64 INTERRUPTS					8-15
8.6 80286-COMPATIBLE BUS CYCLES					8-16
8.6.1	AO/A1 Generator				8-17
8.6.2 SO#/S1# Generator				:	8-18
8.6.3 Wait-State Generator					8-18
8.6.4	Bus Controller and Bus Arbiter				8-20
8.6.5 82380 Integrated System Peripheral					8-21
8.6.6 82586 LAN Coprocessor					8-21
8.6.6.1 DEDICATED CPU					8-24
8.6.6.2 DECOUPLED DUAL-PORT MEMORy					8-24
8.6.6.3 COUPLED DUAL-PORT MEMORy					8-25
8.6.6.4 SHARED BUS				............	8-25
CHAPTER 9
MULTIBUS I AND Intel386 DX MICROPROCESSOR
9.1 MULTIBUS I (IEEE 796)					9-1
9.2 MULTIBUS I INTERFACE EXAMPLE					9-2
9.2.1	Address Latches and Data Transceivers				9-2
9.2.2 Address Decoder					9-5
9.2.3 Wait-State Generator					9-5
9.2.4	Bus Controller and Bus Arbiter				9-7
9.3 TIMING ANALYSIS OF MULTIBUS I INTERFACE					9-10
9.4 82289 BUS ARBITER					9-10
9.4.1	Priority Resolution :				9-11
9.4.2 82289 Operating Modes			:		9-11
9.4.3	MULTIBUS I Locked Cycles		......................................................................................		9-14
9.5 OTHER MULTIBUS I DESIGN CONSIDERATIONS					9-14
9.5.1	Interrupt-Acknowledge on MULTIBUS I				9-14
9.5.2	Byte Swapping during MULTIBUS I Byte Transfers				9-15
9.5.3	Bus Timeout Function for MULTIBUS I Accesses				9-17
9.5.4	MULTIBUS I Power Failure Handling				9-18
9.6 iLBX™		BUS EXPANSION			9-18
9.7 DUAL-PORT RAM WITH MULTIBUS I					9-20
9.7.1	Avoiding Deadlock with Dual-Port RAM				9-20
CHAPTER 10
MULTIBUS II AND Intel386 DX MICROPROCESSOR
10.1	MULTIBUS II STANDARD				10-1
10.2 PARALLEL SYSTEM BUS (iPSB)					10-1
10.2.1 iPSB Interface				;	10-4
10.2.1.1		BAC SIGNALS			10-4
10.2.1.2 MIC SIGNALS					10-6
10.3 LOCAL BUS EXTENSION (iLBX II)					10-7
10.4 SERIAL SYSTEM BUS (iSSB)					10-7

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