TEST CAPABILITIES

The TLB lookup operation progresses as follows:

The linear address and tag values are written to the command register, as well as a 1 value for bit O.

New values for the hit/miss bit and replacement pointer are written to bits 4-2 in the data register. If the hit/miss bit (bit 4) is 1, bits 31-12 contain the physical address from the TLB. Otherwise, bits 31-12 are undefined.

For more information on how to write routines to test the TLB, refer to the 386™ DX

Microprocessor Programmer's Reference Manual.

12.2 BOARD..LEVEL TESTS

For board-level testing, it is often desirable to isolate areas of the board from the inter- actions of other devices. The Inte1386 DX microprocessor can be forced to a state in which all but two of its pins are effectively removed from their circuits. This state is accomplished through the HOLD and HLDA pins.

When the HOLD input of the Inte1386 DX microprocessor is asserted, the Intel386 DX microprocessor places all of its outputs except for HLDA in the three-state condition. HLDA is then driven high. The Intel386 DX microprocessor remains in this condition until HOLD is de-asse,rted. Note that RESET being asserted takes priority over HOLD requests.

The Inte1386 DX microprocessor completes its current bus cycle before responding to the HOLD input. Detailed information on HOLDIHLDA response is given in Chapter 3.

12-5

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Intel 386 manual BOARD..LEVEL Tests