Intel 386 manual Cache Controller

SYSTEM OVERVIEW

The 82380 Integrated System Peripheral is a multi-function Intel386 DX microprocessor companion chip. It integrates a 32-bit DMA Controller with other necessary processor support functions needed in an Intel386 DX microprocessor environment. The 82380 is optimized for use with the Intel386 DX microprocessor. It enhances the overall Intel386 DX microprocessor system performance by providing high data throughput as well as efficient bus operation. The 32-bit DMA Controller provides eight independently pro- grammable channels that can transfer data at the full bandwidth of the Inte1386 DX microprocessor bus. Other features of the 82380 are listed as follows.

• High performance 32-bit DMA Controller

8 independently programmable channels

32 megabytes per second data transfer rate at 16 MHz

40 megabytes per second data transfer rate at 20 MHz

Capable of transferring data between devices with different bus widths

Automatic byte assembly/disassembly capability for non-aligned data transfers

Buffer chaining capability for transferring data into non-contiguous memory buffers

• 20-Source Interrupt Controller

15 external, 5 internal interrupt requests

82C59A susperset

Individually programmable interrupt vectors

•Four 16-bit programmable Interval Timers

-82C54 compatible

•Programmable Wait State Generator

-0 to 15 wait states for memory and I/O access cycles

•DRAM Refresh Controller

-Refresh request always has the highest priority among the DMA requests

•Inte1386 DX microprocessor Shutdown Detect and Reset Control,

-Software and hardware reset

•Optimized for use with the Inte1386 DX microprocessor

Resides on local bus for maximum bus bandwidth

1.4 CACHE CONTROLLER

A cache memory subsystem provides fast local storage for frequently accessed code and - data. This results in faster memory access for the microprocessor· and reduces the amount of traffic on the system bus.

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