
I/O INTERFACING
| 
 | 
 | FROM OTHER | 
 | 
 | 
 | |
| 
 | 
 | PERIPHERALS | Vee | 
 | ||
| 
 | 
 | 
 | 
 | 
 | ||
| CLOCK GENERATOR | 
 | 
 | 
 | 10K!) | ||
| CLK2 RESET | 
 | 
 | 
 | 
 | 
 | RESET | 
| 
 | 
 | 
 | 
 | 
 | 
 | CLK2 | 
| I | 
 | 
 | 
 | 
 | 
 | ADS# | 
| 
 | 
 | 
 | 
 | 
 | 82380 | |
| ADS~ CLK2 | 
 | 
 | 
 | 
 | 
 | |
| 
 | 
 | 
 | 
 | 
 | 
 | |
| RESET | 
 | 
 | 
 | 
 | 
 | CPURST | 
| 
 | 
 | 
 | OPTIONAL | 
 | 
 | READYO# | 
| READY# | 
 | I | WAITSTATE | 
 | 
 | |
| 
 | 
 | LOGIC | 
 | 
 | 
 | |
| i386'"DXCPU | 
 | 
 | 
 | 
 | READY# | |
| HOLD | 
 | 
 | 
 | 
 | 
 | HOLD | 
| HLDA | 
 | 
 | 
 | 
 | 
 | HLDA | 
| INT | 
 | 
 | 
 | 
 | 
 | INT | 
| D/C# | 
 | 
 | 
 | 
 | 
 | D/C# | 
| W/R# | 
 | 
 | 
 | 
 | 
 | W/R# | 
| M/IO# | 
 | 
 | 
 | 
 | 
 | M/IO# | 
| 
 | 
 | 
 | t.. | |||
| K | 
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| I | I I | 
 | ||||
| 
 | ~ | 
 | :. | 
 | ||
| K~ | l | 
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 | r | ||
| 
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| 
 | 
 | 
 | TO BUS | 
 | 
 | 
 | 
| 
 | TO BUS· UU | 
 | 
 | |||
| 
 | CONTROLLER | BUFFERS | 
 | 
 | 
 | |
NOTE: INTERFACE WITHOUT CACHE
Figure 8·13. Intel386™ OX Microprocessor/82380 Interface
LAN. Such a station usually includes a host CPU, shared memory, a Serial Interface Unit, a transceiver, and a LAN link (see Figure 
•Framing
•Link management
•Address filtering
•Error detection
•Data encoding
•Network management
