DRAM PLD DESCRIPTIONS
refresh
address
counter
pal
intel
corporation
Equations
for
Module
refaddr
Device
U3S
-
Reduced
Equations:
RAO
:"
!CRAO);
RA1
:,
!CRAO &
RA1
# !RAO &
!RA1);
RA2
:"
!(RAO
RA1
&
RA2
, !RAO &
!RA2
I !RA1 &
!RA2);
RA3
: ' ! ( R A 0 & R A 1 &
RA2 RA3
,
!RAO
&
!RA3
, ! R A 1 & ! R A 3
I ! R A 2 &
!RA3);
RA4
: ' ! ( R A 0 & R A 1 &
RA2
&
RA3
& R A 4
, ! R A 0 & ! R A 4
, ! R A 1 & ! R A 4
, ! R A 2 & ! R A 4
, ! R A 3 & ! R A
4)
;
RAS
: . ! ( R A 0 & R A 1 &
RA2
& R A 3 & R A 4 & R A 5
, ! R A 0 ! R A 5
, !
RA
1 & !RAS
!RA2 !RAS
! R A 3 ! R A 5
, !RA4 & ! R AS) ;
RAG
: .
!(RAO
& R A 1 & R A 2 &
RA3
& R A 4 & R A 5 &
RAG
,
!RAO
& !RAG
, ! R A 1 & !
RAG
,
!RA2
& !
RAG
I ! R A 3 !
RAG
, !RA4 !RAG
, ! R A 5 ! RAG) ;
RA7
: '
!C
R A 0 & R A 1 &
RA2
&
RA3
&
RA4
&
RAS
&
RAG
& R A 7
, ! R A 0 ! R A 7
! R A 1 ! R A 7
! R A 2 !RA7
,
!RA3
! R A 7
!RA4 !RA7
!RAS !RA7
, !RAG ! R A
7>
;
RAe
: . ! ( R A 0 & R A 1 &
RA2
&
RA3
&
RA4
&
RAS
&
RAG
&
RA7
&
, !RAO
!RAe
! R A 1 !
RAe
! R A 2 !
RAe
!RA3
!
RAe
! R A 4 !
RAe
I ! R A 5 !
RAe
I !
RAG
!
RAe
,
!RA7
! RAe) ;
Figure 8-4. Refresh Address Counter
PLD
Equations (Contd.)
8-15
RAe