MULTIBUS I AND Intel386 DX MICROPROCESSOR
9.2.4 Bus Controller and Bus Arbiter
Connections for the 82288 and 82289 are shown in Figure 9-4. The 82288 can operate in either local-bus mode or MULTIBUS I mode; a pullup resistor on the 82288 MB input activates the MULTIBUS I mode. Both the 82288 and the 82289 are selected by the MBEN output of the address decoder PLD. The AEN# signal from the 82289 enables the 82288 outputs.
Timing diagrams for MULTIBUS I read and write cycles are shown in Figures 9-5 and 9-6. The only differences between the timings are that a read cycle controls the data latch/transceivers using RD# and outputs the MRDC# command signal, whereas a write cycle controls the data latch/transceivers using DEN and outputs the MWTC# command.
SO#
SI#
MIIO#
READY#
MBEN
LOCK#
82289 | | MULTIBUS I |
so# | LLOCK# | r----LOCK# |
SI# | CBRO# I - CBRa# |
MIIO# | BUSY# | I -- BUSY# |
READY# | BPRO# | r----BPRO# |
SYSB | BREa# r--BREa# |
LOCK# | | I- |
| AEN# |
r- BPRN#
BPRN#
82288
---SOtMRDC#
' ---SI#MWDC#
MIIO#IORC#
READY# IOWC#
CENLINTA#
MB
ALE
CMDLY
DTIR#
I AEN#DEN
...+--
t--f--
H"-
H--
r-f-....
MRDC#
MWTC#
IORC#
IOWC#
INTA#
TO MULTIBUS ADDRESS LATCH
}TO MULllBUS DATA TRANSCEIVER
231732i9-4
Figure 9..4. MULTIBUS Arbiter and Bus Controller
9-7
