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Table 3-S. Generation of BHE#, BLE#, and A1 from Byte Enables

InteI386'·OX Microprocessor Signals

 

16-Bit Bus Signals

 

 

BE3#

BE2#

BE1#

BEO#

A1

BHE#

BLE# (AO)

 

Comments

 

 

H*

H*

H*

H*

x

x

x

x -

no active bytes

H

H

H,

L

L

H

L

 

 

H

H

L

H

L

L

H

 

 

H

H

L

L

L

L

L

 

 

H

L

H

H

H

H

L

 

 

H*

L*

H*

L*

x

x

, x

x-not contiguous bytes

H

L

L

H

L

L

H

 

 

H

L

L

L

L

L

L

 

 

L

H

H

H

H

L

H

 

 

L*

H*

H*

L*

x

x

x

x-not contiguous bytes

L*

H*

L*

H*

x

x

x

x-not contiguous bytes

L*

H*

L*

L*

x

x

x

x -

not contiguous bytes

L

L

H

H

H

L

L

 

 

L*

L*

H*

L*

x

' x

x

x -

not contiguous bytes

L

L

L

H

L

L

H

 

 

L

L

L

L

L

L

L

 

 

BLE# asserted when 00-07 of 16-bit bus is active.

BHE# asserted when 08-015 of 16-bit bus is active.

A1 low for all even words; A1 high for all odd words.

Key:

x = don'tcare

H= high voltage level L = low voltage level

*= a non-occurring pattern of Byte Enables; either none are asserted, or the pattern has Byte Enables asserted for non-contiguous bytes

Table 3-6. Byte Enables during B516 Cycles

 

First Cycle

 

 

Second Cycle

 

 

!3E3#

BE2#

BE1#

BEO#

BE3#

BE2#

BE1#

BEO#

High

High

High

Low

No second cycle

 

 

 

High

High

Low

High

No second cycle

 

 

 

High

High

Low

Low

No second cycle

 

 

 

High

Low

High

High

No second cycle

 

 

 

High

Low

Low

High

High

Low

High

High

High

Low

Low

Low

High

Low

High

High

Low

High

High

High

No second cycle

 

 

 

Low

Low

High

High

No second cycle

 

 

 

Low

Low

Low

High

Low

Low

High

High

Low

Low

Low

Low

Low

Low

High

High

 

 

 

 

3-22

 

 

 

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