Intel 386 manual Bus

.

BYTE ENABLESAOIA1 hi

LOGIC

....

l

@)

co

Cu

i386m DX

CPU

A

~1386 DX CPU DATA

...

SO#/S1#

80386STATUS ,.. LOGIC

,

WAIT-STATE

GENERATOR

J

ADDRESS MULTIBUS ADDRESS

LATCHV

...

,)I DATA ~ DATA>

TRANSCEIVER MULTIBUS

!- MULTIBUS I

~82288

BUS

CONTROLLER

~82289

L--.- BUS

ARBITER

.

35:

c:

!:j

m

c: en

l> z c

a

CD

~.

Q)

~

35:

(;

::D

o

"'C

::D

o o

m

en en o

::D

231732i9-1

Figure 9-1. Intel386™ OX Microprocessor/MULTIBUS I Interface