COPROCESSOR HARDWARE INTERFACE
•ERROR# is asserted after a coprocessor math instruction results in an error that is not masked by the coprocessor's control register. The data sheets for the Intel387 DX math coprocessor describe these errors and explain how to mask them under program control. If an error occurs, ERROR# goes active before BUSY# goes inactive, so that the Intel386 DX microprocessor can take care of the error before performing another data transfer.
5.1Intel387 OX MATH COPROCESSOR INTERFACE
The Intel387 DX math coprocessor achieves significant enhancements in performance and instruction capabilities over the 80287. To achieve maximum speed, the interface with the Inte1386 DX microprocessor is synchronous and includes a full
The Intel387 DX math coprocessor is designed to run either fully synchronously or pseudosynchronously with the Intel386 OX microprocessor. In the pseudosynchronous mode, the interface logic of the Intel387 OX math coprocessor runs with the clock signal of the Inte1386 DX microprocessor, whereas internal logic runs with a different clock signal.
5.1.1 Intel387 OX Math Coprocessor Connections
The connections between the Intel386 DX microprocessor and the Inte1387 DX math coprocessor are shown in Figure
•The Intel387 DX math coprocessor BUSY#, ERROR#, and PEREQ outputs are connected to corresponding Inte1386 DX microprocessor inputs.
•The Intel387 DX math coprocessor RESETIN input is connected to the system's RESET signal.
•The Intel387 DX math coprocessor Numeric Processor Select
•The Intel387 DX math coprocessor Command (CMDO#) input differentiates data from commands. This input is connected directly to the Inte1386 DX microprocessor A2 output. The Inte1386 DX microprocessor outputs address 800000F8H when writ- ing a command or reading status, address 800000FCH when writing or reading data.
•All 32 bits