CHAPTER 3
LOCAL BUS INTERFACE
Local bus operations are considered
in
this chapter. The Inte1386
DX
microprocessor
performs a variety of bus operations in response to internal conditions and external
conditions (interrupt servicing, for example). The function and timing of the signals that
make up the local bus interface are described,
as
well
as
the sequences of particular local
bus operations.
The high-speed bus interface of the Intel386 DX microprocessor provides high perfor-
mance
in
any system.
At
33
MHz, the Inte1386 DX CPU bus transfers up to
66
Mbytes/
sec. of data. At the same time, the bus control inputs and status outputs of the
Intel386
DX
microprocessor allow for adaptation to a wide variety of system
environments.
The Intel386 DX microprocessor communicates with external memory, I/O, and other
devices through a parallel bus interface. This interface consists of a data bus, a separate
address bus,
five
bus status pins, and three bus control pins as follows:
• The bidirectional data bus consists of
32
pins (D31-DO). Either
8,
16,24, or 32 bits of
data can be transferred at once.
• The address bus, which generates 32-bit addresses, consists of
30
address pins
(A31-A2) and four byte-enable pins (BE3#-BEO#). Each byte-enable pin corre-
sponds to one of four bytes of the 32-bit data bus. The address pins identify a 4-byte
location, and the byte-enable pins select the active bytes within the 4-byte location.
• The bus status pins establish the type of bus
cycle
to be performed. These outputs
indicate the following conditions:
Address Status
(ADS#)-address
bus outputs valid
Write/Read
(W/R#)-write
or read
cycle
Memory /I/O
(M/IO#)-memory
or I/O access
Data/Control
(D/C#)
-data or control
cycle
LOCK#
-locked
bus cycle.
• The bus control pins allow external logic to control the bus cycle on a cycle-by-cycle
basis. These inputs perform the following functions:
READY # - ends the current bus cycle; controls bus cycle duration
Next Address
(NA#)
-allows address pipelining, that
is,
emitting address and status
signals for the next bus cycle during the current
cycle
Bus Size
16
(BS16#)-activates
16-bit data bus operation; data
is
transferred on the
lower
16
bits of the data bus, and an extra
cycle
is
provided for transfers of more than
16
bits. .
The following pins are used to control the execution of.instructions in the Intel386
DX
microprocessor and to interface external bus masters. The Intel386 DX microprocessor
provides both a standard interface to communicate with other bus masters and a special
interface to support a numerics coprocessor.
3-1