Motorola MCF5281, MCF5282 user manual Illustrations, Title Number

ILLUSTRATIONS

Figure	Title	Page
Number		Number
1-1	MCF5282 Block Diagram	1-7
2-1	ColdFire Processor Core Pipelines	2-1
2-2	User Programming Model	2-4
2-3	Condition Code Register (CCR)	2-4
2-4	EMAC Register Set	2-5
2-5	Supervisor Programming Model	2-6
2-6	Status Register	2-6
2-7	Exception Stack Frame Form	2-12
2-8	D0 Hardware Configuration Info	2-17
2-9	D1 Hardware Configuration Info	2-19
3-1	Multiply-Accumulate Functionality Diagram	3-2
3-2	Infinite Impulse Response (IIR) Filter	3-3
3-3	Four-Tap FIR Filter	3-3
3-4	Fractional Alignment	3-4
3-5	Signed and Unsigned Integer Alignment	3-4
3-6	EMAC Register Set	3-6
3-7	MAC Status Register (MACSR)	3-6
3-8	EMAC-Specific OEP Sequence Stall	3-13
3-9	Two’s Complement, Signed Fractional Equation	3-14
4-1	Cache Block Diagram	4-3
4-2	Cache Control Register (CACR)	4-8
4-3	Access Control Registers (ACR0, ACR1)	4-11
5-1	SRAM Base Address Register (RAMBAR)	5-2
6-1	CFM Block Diagram	6-3
6-2	CFM Array Memory Map	6-4
6-3	Flash Base Address Register (FLASHBAR)	6-7
6-4	CFM Module Configuration Register (CFMCR)	6-9
6-5	CFM Clock Divider Register (CFMCLKD)	6-10
6-6	CFM Security Register (CFMSEC)	6-11
6-7	CFM Protection Register (CFMPROT)	6-12
6-8	CFMPROT Protection Diagram	6-13
6-9	CFM Supervisor Access Register (CFMSACC)	6-13
6-10	CFM Data Access Register (CFMDACC)	6-14
6-11	CFM User Status Register (CFMUSTAT)	6-15
6-12	CFM Command Register (CFMCMD)	6-16
6-13	Example Program Algorithm	6-21

MOTOROLA Illustrations xxiii