Memory Map and Registers

 

 

 

Table 18-3. WCR Field Descriptions

 

 

 

 

Bit(s)

Name

 

Description

 

 

 

15–4

Reserved, should be cleared.

 

 

 

3

WAIT

Wait mode bit. Controls the function of the watchdog timer in wait mode. Once written, the

 

 

WAIT bit is not affected by further writes except in halted mode. Reset sets WAIT.

 

 

1

Watchdog timer stopped in wait mode

 

 

0

Watchdog timer not affected in wait mode

 

 

 

2

DOZE

Doze mode bit. Controls the function of the watchdog timer in doze mode. Once written, the

 

 

DOZE bit is not affected by further writes except in halted mode. Reset sets DOZE.

 

 

1

Watchdog timer stopped in doze mode

 

 

0

Watchdog timer not affected in doze mode

 

 

 

1

HALTED

Halted mode bit. Controls the function of the watchdog timer in halted mode. Once written, the

 

 

HALTED bit is not affected by further writes except in halted mode.

 

 

During halted mode, watchdog timer registers can be written and read normally. When halted

 

 

mode is exited, timer operation continues from the state it was in before entering halted mode,

 

 

but any updates made in halted mode remain. If a write-once register is written for the first time

 

 

in halted mode, the register is still writable when halted mode is exited.

 

 

1

Watchdog timer stopped in halted mode

 

 

0

Watchdog timer not affected in halted mode

 

 

Note: Changing the HALTED bit from 1 to 0 during halted mode starts the watchdog timer.

 

 

Changing the HALTED bit from 0 to 1 during halted mode stops the watchdog timer.

 

 

 

0

EN

Watchdog enable bit. Enables the watchdog timer. Once written, the EN bit is not affected by

 

 

further writes except in halted mode. When the watchdog timer is disabled, the watchdog

 

 

counter and prescaler counter are held in a stopped state.

 

 

1

Watchdog timer enabled

 

 

0

Watchdog timer disabled

 

 

 

 

18.5.2.2Watchdog Modulus Register (WMR)

 

15

14

13

12

11

10

9

8

Field

WM15

WM14

WM13

WM12

 

WM11

WM10

WM9

WM8

 

 

 

 

 

 

 

 

 

Reset

 

 

 

1111_1111

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

Field

WM7

WM6

WM5

WM4

 

WM3

WM2

WM1

WM0

 

 

 

 

 

 

 

 

 

Reset

 

 

 

1111_1111

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

Address

 

 

IPSBAR + 0x0014_0002, 0x0014_0003

 

 

 

 

 

 

 

 

 

 

 

 

Figure 18-3. Watchdog Modulus Register (WMR)

18-4

MCF5282 User’s Manual

MOTOROLA

Page 412
Image 412
Motorola MCF5282, MCF5281 user manual Watchdog Modulus Register WMR, WCR Field Descriptions