Motorola MCF5282, MCF5281 user manual Index-4

INDEX

E

Electrical characteristics bus

external output timing specifications, 33-11processor input timing specifications, 33-10

ColdFire Flash module

module life characteristics, 33-10program and erase characteristics, 33-9

DC specifications, 33-4

debug AC timing specifications, 33-27,33-27DMA timer AC timing specifications, 33-24FEC AC timing specifications, 33-20GPIO timing, 33-17

I2C input timing between SCL and SDA, 33-19I2C input/output timing specifications, 33-19I2C output timing between SCL and SDA, 33-20JTAG and boundary scan timing, 33-25maximum ratings, 33-1

MII async inputs signal timing, 33-22MII receive signal timing, 33-21

MII serial management channel timing, 33-23MII transmit signal timing, 33-21

PLL specifications, 33-6

QADC absolute maximum ratings, 33-7

QADC operating conversion specifications, 33-9QADC operating electrical specifications, 33-7QSPI AC timing specifications, 33-24

QSPI specifications, 33-24

reset and configuration override timing, 33-18SDRAM timing, 33-16

thermal, 33-3

EMAC

data representation, 3-13instruction set

execution times, 3-12execution timing, 2-27summary, 3-12

MAC, comparison, 3-1memory map, 3-6opcodes, 3-14operation

fractional, 3-8general, 3-3

programming model, 2-5registers

BDM accesses, 29-33mask (MASK), 3-11status (MACSR), 3-6

ENABLE_TEST_CTRL instruction, 31-10End-of-frame (EOF), 25-13

EPORT

low-power modes, 7-12,11-1memory map, 11-3overview, 11-1

programming model, 7-1registers

data direction (EPDDR), 11-4flag (EPFR), 11-6

pin assignment (EPPAR), 11-4pin data (EPPDR), 11-6

port data (EPDR), 11-5

port interrupt enable (EPIER), 11-5Error counters, 25-15

Error interrupt (ERRINT) bit, 25-30Ethernet

address recognition, 17-11block diagram, 17-4buffer descriptors

receive (RxBD), 17-47driver/DMA operation, 17-46

collision handling, 17-17electrical characteristics

MII receive signal timing, 33-21

MII serial management channel timing, 33-23MII transmit signal timing, 33-21

error handling, 17-18features, 17-1

frame reception, 17-10frame transmission, 17-9hash table

algorithm, 17-13effectiveness, 17-14

initialization, 17-6interface

10 Mbps 7-Wire, 17-3,17-8

10Mbps and 100 Mbps MII, 17-2,17-8interpacket gap time, 17-17

loopback, internal and external, 17-17memory map

control/status registers, 17-20MIB block counters, 17-21

operation

full duplex, 17-2,17-16half duplex, 17-2low-power modes, 7-10

overview, 17-1programming model, 17-20reception errors

CRC, 17-19

frame length, 17-19non-octet, 17-19overrun, 17-19truncation, 17-20

registers

control (ECR), 17-28

descriptor group upper/lower address (GAUR/GALR), 17-39

descriptor individual upper/lower

Index-4 MCF5282 User’s Manual MOTOROLA