INDEX

(IAUR/IALR), 17-38

descriptor individual upper/lower address (IAUR/IALR), 17-37

FIFO receive bound (FRBR), 17-41FIFO receive start (FRSR), 17-42

FIFO transmit FIFO watermark (TFWR), 17-40interrupt event (EIR), 17-23

interrupt mask (EIMR), 17-26MIB control (MIBC), 17-32

MII management frame (MMFR), 17-29MII speed control (MSCR), 17-31opcode/pause duration (OPD), 17-37

physical address low/high (PALR, PAUR), 17-35receive buffer size (EMRBR), 17-44

receive control (RCR), 17-33

receive descriptor active (RDAR), 17-26receive descriptor ring start (ERDSR), 17-42transmit buffer descriptor ring start

(ETSDR), 17-43transmit control (TCR), 17-34

transmit descriptor active (TDAR), 17-27transmission errors

heartbeat, 17-19late collision, 17-18

retransmission attempts limit expired, 17-18transmitter underrun, 17-18

Exceptions access error, 2-13address error, 2-14divide-by-zero, 2-14exception stack frame, 2-12format error, 2-16

illegal instruction, 2-14overview, 2-10privilege violation, 2-14program counter, 2-3reset, 2-16

trace, 2-14

TRAP instruction, 2-16vector table, 2-11

External interface module (EIM), seebus EXTEST instruction, 31-9

F

Fault confinement state (FCS), 25-29Fault-on-fault halt, 2-16,29-17 FEC, see Ethernet

FF1 instruction, 2-31Fill buffer, 4-1

Flash, see ColdFire Flash module FlexCAN

bit timing, 25-14

CAN system overview, 25-4error counters, 25-15

features, 25-1

format frames, 25-5–25-7IDLE bit, 25-29initialization sequence, 25-16interrupts, 25-19

memory map, 25-3message buffers

BUSY, 25-6

EMPTY, 25-6

FULL, 25-6handling, 25-10

locking and releasing, 25-12receive deactivation, 25-11serial message buffers, 25-11transmit deactivation, 25-11

NOT ACTIVE, 25-6overload frames, 25-13OVERRUN, 25-6receive

codes, 25-6

error status flag (RXWARN), 25-29

pin configuration control (RXMODE), 25-23remote frames, 25-12

self-received frames, 25-10status, 25-29

structure, 25-4time stamp, 25-13transmit

codes, 25-6

error status flag (TXWARN), 25-29length, 25-6

pin configuration control (TXMODE), 25-23NOTRDY bit, 25-20

operation

auto power save mode, 25-19bit timing configuration, 25-14debug mode, 25-17listen-only mode, 25-13low-power modes, 7-13,25-17

overview, 25-1receive process, 25-9registers

bit timing, 25-14

control 0–2 (CANCTRLn), 25-22–25-25error and status (ESTAT), 25-28

free running timer (TIMER), 25-26interrupt flag (IFLAG), 25-31interrupt mask (IMASK), 25-30module configuration (CANMCR), 25-20prescaler divide (PRESDIV), 25-24receive error counter (RXECTR), 25-32

receive mask (RXGMASK, RXnMASK), 25-27transmit error counter (TXECTR), 25-32

SAMP bit, 25-24transmit process, 25-9

MOTOROLA

MCF5282 User’s Manual

Index-5

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Motorola MCF5281, MCF5282 user manual Index-5