Motorola MCF5282, MCF5281 user manual Read Cycle

Data Transfer Operation

Table 13-3. Bus Cycle States (Continued)

State

Cycle

CLKOUT

Description

S3

Read/write

Low

The MCF5282 waits for

assertion. If

is not sampled as asserted before the

TA

TA

(skipped for

rising edge of CLKOUT at the end of the first clock cycle, the MCF5282 inserts

fast

wait states (full clock cycles) until

TA

is sampled as asserted.

termination)

Read

Data is made available by the external device on the falling edge of CLKOUT and

is sampled on the rising edge of CLKOUT with TA asserted.

S4

All

High

The external device should negate

TA.

Read

The external device can stop driving data after the rising edge of CLKOUT.

(including

However data could be driven through the end of S5.

fast-terminat

ion)

S5

S5

Low

and

are negated on the CLKOUT falling edge of S5. The MCF5282

CS,

BS,

OE

stops driving address lines and R/W on the rising edge of CLKOUT, terminating

the read or write cycle. At the same time, the MCF5282 negates TIP, and SIZ[1:0]

on the rising edge of CLKOUT.

Note that the rising edge of CLKOUT may be the start of S0 for the next access

cycle.

Read

The external device stops driving data between S4 and S5.

Write

The data bus returns to high impedance on the rising edge of CLKOUT. The

rising edge of CLKOUT may be the start of S0 for the next access.

NOTE:

An external device has at most two CLKOUT cycles after the start of S4 to three-state the data bus. This applies to basic read cycles, fast termination cycles, and the last transfer of a burst.

13.4.3 Read Cycle

During a read cycle, the MCF5282 receives data from memory or from a peripheral device. Figure 13-5is a read cycle flowchart.

13-6 MCF5282 User’s Manual MOTOROLA