Motorola MCF5281 Microcontroller Initialization, User Initialization After Asserting Ecretheren

Functional Description

Table 17-2. User Initialization (Before ECR[ETHER_EN]) (continued)

Description

MSCR (optional)

Clear MIB_RAM (locations IPSBAR + 0x1200-0x12FC)

FEC FIFO/DMA registers that require initialization are defined in Table 17-3.

Table 17-3. FEC User Initialization (Before ECR[ETHER_EN])

Description

Initialize FRSR (optional)

Initialize EMRBR

Initialize ERDSR

Initialize ETDSR

Initialize (Empty) Transmit Descriptor ring

Initialize (Empty) Receive Descriptor ring

17.4.3 Microcontroller Initialization

In the FEC, the descriptor control RISC initializes some registers after ECR[ETHER_EN] is asserted. After the microcontroller initialization sequence is complete, the hardware is ready for operation.

Table 17-4shows microcontroller initialization operations.

Table 17-4. Microcontroller Initialization

Description

Initialize BackOff Random Number Seed

Activate Receiver

Activate Transmitter

Clear Transmit FIFO

Clear Receive FIFO

Initialize Transmit Ring Pointer

Initialize Receive Ring Pointer

Initialize FIFO Count Registers

17.4.4 User Initialization (After Asserting ECR[ETHER_EN])

After asserting ECR[ETHER_EN], the user can set up the buffer/frame descriptors and write to the TDAR and RDAR. Refer to Section 17.6, “Buffer Descriptors” for more details.

MOTOROLA Chapter 17. Fast Ethernet Controller (FEC) 17-7