Motorola MCF5282, MCF5281 Move Instruction Execution Times, Misaligned Operand References

Instruction Execution Timing

2.The OEP does not experience any sequence-related pipeline stalls. For V2 ColdFire processors, the most common example of this type of stall involves consecutive store operations, excluding the MOVEM instruction. For all STORE operations (except MOVEM), certain hardware resources within the processor are marked as “busy” for two processor clock cycles after the final DSOC cycle of the store instruction. If a subsequent STORE instruction is encountered within this 2-cycle window, it will be stalled until the resource again becomes available. Thus, the maximum pipeline stall involving consecutive STORE operations is 2 cycles. The MOVEM instruction uses a different set of resources and this stall does not apply.

3.The OEP completes all memory accesses without any stall conditions caused by the memory itself. Thus, the timing details provided in this section assume that an infinite zero-wait state memory is attached to the processor core.

4.All operand data accesses are aligned on the same byte boundary as the operand size: that is, 16 bit operands aligned on 0-modulo-2 addresses and 32 bit operands aligned on 0-modulo-4 addresses.

If the operand alignment fails these guidelines, it is misaligned. The processor core decomposes the misaligned operand reference into a series of aligned accesses as shown in Table 2-10.

Table 2-10. Misaligned Operand References

Address[1:0]	Size	Kbus	Additional
		Operations	C(R/W)
X1	Word	Byte, Byte	2(1/0) if read
			1(0/1) if write
X1	Long	Byte, Word, Byte	3(2/0) if read
			2(0/2) if write
10	Long	Word, Word	2(1/0) if read
			1(0/1) if write

2.8.2MOVE Instruction Execution Times

The execution times for the MOVE.{B,W} instructions are shown in Table 2-11,while Table 2-12provides the timing for MOVE.L.

For all tables in this section, the execution time of any instruction using the PC-relative effective addressing modes is the same for the comparable An-relative mode.

The nomenclature “xxx.wl” refers to both forms of absolute addressing, xxx.w and xxx.l.

2-22 MCF5282 User’s Manual MOTOROLA