External Interface Timing Characteristics

Table 33-9. SGFM Flash Module Life Characteristics

(VDDF = 2.7 to 3.6 V)

Parameter

Symbol

Value

Unit

 

 

 

 

Maximum number of guaranteed program/erase cycles1 before failure

P/E

10,0002

Cycles

Data retention at average operating temperature of 85°C

Retention

10

Years

1A program/erase cycle is defined as switching the bits from 1 0 1.

2Reprogramming of a Flash array block prior to erase is not required.

33.7External Interface Timing Characteristics

Table 33-10lists processor bus input timings.

NOTE:

All processor bus timings are synchronous; that is, input setup/hold and output delay with respect to the rising edge of a reference clock. The reference clock is the CLKOUT output.

All other timing relationships can be derived from these values.

Table 33-10. Processor Bus Input Timing Specifications

Name

 

 

Characteristic1

Symbol

Min

Max

Unit

B0

CLKOUT

tCYC

12.5

ns

 

 

 

Control Inputs

 

 

 

 

 

 

 

 

 

 

B1a

Control input valid to CLKOUT high2

tCVCH

10

ns

B1b

 

 

valid to CLKOUT high3

tBKVCH

10

ns

 

BKPT

B2a

 

CLKOUT high to control inputs invalid2

tCHCII

0

ns

B2b

 

CLKOUT high to asynchronous control input

 

invalid3

tBKNCH

0

ns

 

BKPT

 

 

 

Data Inputs

 

 

 

 

 

 

 

 

 

 

 

B4

 

Data input (D[31:0]) valid to CLKOUT high

tDIVCH

6

ns

B5

 

CLKOUT high to data input (D[31:0]) invalid

tCHDII

0

ns

1Timing specifications have been indicated taking into account the full drive strength for the pads.

2TEA and TA pins are being referred to as control inputs.

3Refer to figure A-19.

33-10

MCF5282 User’s Manual

MOTOROLA

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Motorola MCF5282, MCF5281 user manual External Interface Timing Characteristics, Sgfm Flash Module Life Characteristics