Memory Map/Register Definition

Table 26-2. MCF5282 Ports Module Memory Map (continued)

IPSBAR +

31–24

23–16

15–8

 

7–0

Access 1

Offset

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port Data Direction Registers

 

 

 

 

 

 

 

 

 

 

0x10_0014

DDRA

DDRB

DDRC

 

DDRD

S/U

 

 

 

 

 

 

 

0x10_0018

DDRE

DDRF

DDRG

 

DDRH

S/U

 

 

 

 

 

 

 

0x10_001C

DDRJ

DDRDD

DDREH

 

DDREL

S/U

 

 

 

 

 

 

 

0x10_0020

DDRAS

DDRQS

DDRSD

 

DDRTC

S/U

 

 

 

 

 

 

0x10_0024

DDRTD

DDRUA

Reserved2

S/U

 

 

Port Pin Data/Set Data Registers

 

 

 

 

 

 

 

 

 

 

0x10_0028

PORTAP/SETA

PORTBP/SETB

PORTCP/SETC

 

PORTDP/SETD

S/U

 

 

 

 

 

 

 

0x10_002C

PORTEP/SETE

PORTFP/SETF

PORTGP/SETG

 

PORTHP/SETH

S/U

 

 

 

 

 

 

 

0x10_0030

PORTJP/SETJ

PORTDDP/SETDD

PORTEHP/SETEH

 

PORTELP/SETEL

S/U

 

 

 

 

 

 

 

0x10_0034

PORTASP/SETAS

PORTQSP/SETQS

PORTSDP/SETSD

 

PORTTCP/SETTC

S/U

 

 

 

 

 

 

0x10_0038

PORTTDP/SETTD

PORTUAP/SETUA

Reserved2

S/U

 

 

Port Clear Output Data Registers

 

 

 

 

 

 

 

 

 

 

0x10_003C

CLRA

CLRB

CLRC

 

CLRD

S/U

 

 

 

 

 

 

 

0x10_0040

CLRE

CLRF

CLRG

 

CLRH

S/U

 

 

 

 

 

 

 

0x10_0044

CLRJ

CLRDD

CLREH

 

CLREL

S/U

 

 

 

 

 

 

 

0x10_0048

CLRAS

CLRQS

CLRSD

 

CLRTC

S/U

 

 

 

 

 

 

0x10_004C

CLRTD

CLRUA

Reserved2

S/U

 

 

Port Pin Assignment Registers

 

 

 

 

 

 

 

 

 

 

0x10_0050

PBCDPAR

PFPAR

 

PEPAR

S/U

 

 

 

 

 

 

0x10_0054

PJPAR

PSDPAR

 

PASPAR

S/U

 

 

 

 

 

 

 

 

0x10_0058

PEHLPAR

PQSPAR

PTCPAR

 

PTDPAR

S/U

 

 

 

 

 

 

 

0x10_005C

PUAPAR

 

Reserved2

 

 

S/U

0x10_0060–

 

Reserved2

 

 

 

$007C

 

 

 

 

 

 

 

 

 

 

 

 

 

1S/U = supervisor or user mode access. User mode accesses to supervisor-only addresses have no effect and cause a cycle termination transfer error.

2Writing to reserved address locations has no effect and reading returns 0s.

MOTOROLA

Chapter 26. General Purpose I/O Module

26-7

Page 565
Image 565
Motorola MCF5281 Ddrb Ddrc, Ddreh Ddrel, Clra Clrb Clrc Clrd, Clre Clrf Clrg Clrh, Clrj, Clreh Clrel, Clras Clrqs Clrsd