Motorola MCF5282, MCF5281 user manual Prioritization Between Interrupt Controllers, Vector

Prioritization Between Interrupt Controllers

This interrupt controller design also supports the concept of a software IACK. A software IACK is a useful concept that allows an interrupt service routine to determine if there are other pending interrupts so that the overhead associated with interrupt exception processing (including machine state save/restore functions) can be minimized. In general, the software IACK is performed near the end of an interrupt service routine, and if there are additional active interrupt sources, the current interrupt service routine (ISR) passes control to the appropriate service routine, but without taking another interrupt exception.

When the interrupt controller receives a software IACK read, it returns the vector number associated with the highest level, highest priority unmasked interrupt source for that interrupt controller. The IACKLPR register is also loaded as the software IACK is performed. If there are no active sources, the interrupt controller returns an all-zero vector as the operand. For this situation, the IACKLPR register is also cleared.

In addition to the software IACK registers within each interrupt controller, there are global software IACK registers. A read from the global SWIACK will return the vector number for the highest level and priority unmasked interrupt source from all interrupt controllers. A read from one of the LnIACK registers will return the vector for the highest priority unmasked interrupt within a level for all interrupt controllers.

Field

Reset

R/W

Address

7 6 4 3 0

VECTOR

0000_0000

R

See Table 10-2and Table 10-3for register offsets

Figure 10-10. Software and Level n IACK Registers (SWIACKR, L1IACK–L7IACK)

Table 10-15. SWIACK and L1IACK-L7IACK Field Descriptions

Bits	Name	Description
7–0	VECTOR	Vector number. A read from the SWIACK register returns the vector number associated with the
		highest level, highest priority unmasked interrupt source. A read from one of the LnACK registers
		returns the highest priority unmasked interrupt source within the level.

10.4 Prioritization Between Interrupt Controllers

The interrupt controllers have a fixed priority, where INTC0 has the highest priority, and INTC1 has the lowest priority. If both interrupt controllers have active interrupts at the same level and priority, then the INTC0 interrupt will be serviced first. If INTC1 has an active interrupt that has a higher level or priority than the highest INTC0 interrupt, then the INTC1 interrupt will be serviced first.

10-16 MCF5282 User’s Manual MOTOROLA