Motorola MCF5281 Register Descriptions, Uart Module Memory Map, Ipsbar Offset 3124 2316 158

Register Descriptions

23.3 Register Descriptions

This section contains a detailed description of each register and its specific function. Flowcharts in Section 23.5.6, “Programming,” describe basic UART module programming. The operation of the UART module is controlled by writing control bytes into the appropriate registers. Table 23-1is a memory map for UART module registers.

Table 23-1. UART Module Memory Map

IPSBAR Offset			[31:24]	[23:16]	[15:8]	[7:0]
UART0	UART1	UART2
0x200	0x240	0x280	UART mode registers 1—(UMR1n) [p. 23-4],		—
			(UMR2n) [p. 23-6]
0x204	0x244	0x284	(Read) UART status registers—(USRn) [p. 23-7]		—
			(Write) UART clock select register1—(UCSRn)		—
			[p. 23-8]
0x208	0x248	0x288	(Read) Do not access 2		—
			(Write) UART command registers—(UCRn)		—
			[p. 23-9]
0x20C	0x24C	0x28C	(UART/Read) UART receive buffers—(URBn)		—
			[p. 23-11]
			(UART/Write) UART transmit buffers—(UTBn)		—
			[p. 23-11]
0x210	0x250	0x290	(Read) UART input port change		—
			registers—(UIPCRn) [p. 23-12]
			(Write) UART auxiliary control		—
			registers1—(UACRn) [p. 23-13]
0x214	0x254	0x294	(Read) UART interrupt status registers—(UISRn)		—
			[p. 23-13]
			(Write) UART interrupt mask		—
			registers—(UIMRn) [p. 23-13]
0x218	0x258	0x298	(Read) Do not access2		—
			UART divider upper registers—(UBG1n)		—
			[p. 23-14]
0x21C	0x25C	0x29C	(Read) Do not access2		—
			UART divider lower registers—(UBG2n)		—
			[p. 23-14]
0x234	0x274	0x2B4	(Read) UART input port registers—(UIPn)		—
			[p. 23-15]
			(Write) Do not access2		—
0x238	0x278	0x2B8	(Read) Do not access2		—
			(Write) UART output port bit set command		—
			registers—(UOP1n3) [p. 23-15]

MOTOROLA Chapter 23. UART Modules 23-3