Motorola MCF5282, MCF5281 CFM Registers, Register Descriptions, CFM Configuration Register Cfmcr

Memory Map

6.3.3CFM Registers

The CFM module also contains a set of control and status registers. The memory map for these registers and their accessibility in supervisor and user modes is shown in Table 6-3.

Table 6-3. CFM Register Address Map

IPSBAR Offset	Bits 31–24	Bits 23–16		Bits 15–8	Bits 7–0	Access 1
0x1D_0000	CFMMCR		CFMCLKD		Reserved 2	S
0x1D_0004		Reserved2				S
0x1D_0008		CFMSEC				S
0x1D_000C		Reserved2				S
0x1D_0010		CFMPROT				S
0x1D_0014		CFMSACC				S
0x1D_0018		CFMDACC				S
0x1D_001C		Reserved2				S
0x1D_0020	CFMUSTAT			Reserved2		S
0x1D_0024	CFMCMD			Reserved2		S

1S = Supervisor access only. User mode accesses to supervisor only addresses have no effect and result in a cycle termination transfer error.

2Addresses not assigned to a register and undefined register bits are reserved for expansion. Write accesses to these reserved address spaces and reserved register bits have no effect.

6.3.4Register Descriptions

The Flash registers are described in this subsection.

6.3.4.1CFM Configuration Register (CFMCR)

The CFMCR is used to configure and control the operation of the CFM array.

Field

Reset

R/W Address

15	11	10	9	8	7	6	5	4	0
—		LOCK	PVIE	AEIE	CBEIE	CCIE	KEYACC		—

0000_0000_0000_0000

R/W

IPSBAR + 0x1D_0000

Figure 6-4. CFM Module Configuration Register (CFMCR)

Bits 10 -5 in the CFMCR register are readable and writable with restrictions.

6-8 MCF5282 User’s Manual MOTOROLA