Processor Bus Output Timing Specifications

Table 33-11. External Bus Output Timing Specifications (Continued)

Name

Characteristic

Symbol

Min

Max

Unit

 

 

 

 

 

Address and Attribute Outputs

B8

B9

 

 

 

tCHAV

 

 

 

CLKOUT high to address (A[23:0]) and control (TS,

10

ns

SIZ[1:0], TIP, R/W) valid

 

 

 

 

CLKOUT high to address (A[23:0]) and control

 

 

tCHAI

2

ns

(TS,

SIZ[1:0], TIP, R/W) invalid

 

 

 

 

Data Outputs

 

 

 

 

 

 

 

 

B11

CLKOUT high to data output (D[31:0]) valid

tCHDOV

10

ns

B12

CLKOUT high to data output (D[31:0]) invalid

tCHDOI

2

ns

B13

CLKOUT high to data output (D[31:0]) high impedance

tCHDOZ

6

ns

1CSn transitions after the falling edge of CLKOUT.

2BS transitions after the falling edge of CLKOUT.

3OE transitions after the falling edge of CLKOUT.

Read/write bus timings listed in Table 33-11are shown in Figure 33-2, Figure 33-3,and Figure 33-4.

33-12

MCF5282 User’s Manual

MOTOROLA

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Motorola MCF5282, MCF5281 user manual Data Outputs