Memory Map/Register Definition

Field

Reset

R/W: Address

7

4

3

2

1

0

 

PORTnP3/

PORTnP2/

PORTnP1/

PORTnP0/

 

 

SETn3

SETn2

 

SETn1

SETn0

 

 

 

 

 

 

0000

 

 

Current Pin State

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

IPSBAR + 0x10_0037 (PORTTCP/SETTC), 0x10_0038 (PORTTDP/SETTD), 0x10_0039

(PORTUAP/SETUA)

Figure 26-13. Port Pin Data/Set Data Registers (4-bit)

PORTnP/SETn bits are described in Table 26-5.

Table 26-5. PORTnP/SETn (8-bit, 6-bit, and 4-bit) Field Descriptions

Register

Bits

Name

Description

 

 

 

 

8-bit

7–0

PORTxnP/SETxn

Port x Pin Data/Set Data Bits

 

 

 

1 Port x pin state is 1 (read); set corresponding PORTx bit

7-bit

6–0

 

 

(write)

 

 

 

6-bit

5–0

 

0 Port x pin state is 0 (read)

 

 

 

 

 

 

4-bit

3–0

 

 

 

 

 

 

7-bit

7

Reserved, should be cleared.

 

 

 

 

6-bit

7–6

 

 

 

 

 

 

4-bit

7–4

 

 

 

 

 

 

26.3.2.4Port Clear Output Data Registers (CLRn)

Clearing a CLRn register clears the corresponding bits in the PORTn register. Setting it has no effect. Reading the CLRn register returns 0s.

Most PORTn registers have a full 8-bit implementation, as shown in Figure 26-14.The remaining PORTn registers use fewer than eight bits. Their bit definitions are shown in Figure 26-15, Figure 26-16,and Figure 26-17.

The CLRn registers are read/write accessible.

 

7

6

5

4

3

2

 

1

0

Field

CLRn7

CLRn6

 

CLRn5

CLRn4

 

CLRn3

CLRn2

 

CLRn1

CLRn0

 

 

 

 

 

 

 

 

 

 

 

Reset

 

 

 

 

0000_0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W:

 

 

 

 

 

R/W

 

 

 

 

 

 

Address

IPSBAR + 0x10_003C (CLRA), 0x10_003D (CLRB), 003E (CLRC), 0x10_003F (CLRD), 0x10_0040

 

(CLRE), 0x10_0041 (CLRF), 0x10_0042 (CLRG), 0x10_0043 (CLRH), 0x10_0044 (CLRJ), 0x10_0045

 

 

 

(CLRDD), 0x10_0046 (CLREH), 0x10_0047 (CLREL)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 26-14. Port Clear Output Data Registers (8-bit)

26-12

MCF5282 User’s Manual

MOTOROLA

Page 570
Image 570
Motorola MCF5282, MCF5281 Port Clear Output Data Registers CLRn, PORTnP/SETn bits are described in Table, Portuap/Setua