Background Debug Mode (BDM)

29.5.3.3.9 Read Control Register (RCREG)

Reads the selected control register and returns the 32-bit result. Accesses to the processor/memory control registers are always 32 bits wide, regardless of register width. The second and third words of the command form a 32-bit address, which the debug module uses to generate a special bus cycle to access the specified control register. The 12-bit Rc field is the same as that used by the MOVEC instruction.

Command/Result Formats:

15

12

11

8

7

4

3

0

Command

 

0x2

 

0x9

0x8

 

 

0x0

 

 

 

 

 

 

 

 

 

 

 

0x0

 

0x0

0x0

 

 

0x0

 

 

 

 

 

 

 

 

 

 

 

0x0

 

 

Rc

 

 

 

 

 

 

 

 

 

 

 

 

Result

 

 

 

D[31:16]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D[15:0]

 

 

 

 

 

 

 

 

 

 

 

 

Figure 29-33. RCREG Command/Result Formats

Rc encoding:

 

Table 29-19. Control Register Map

 

 

 

Rc

 

Register Definition

 

 

 

0x002

 

Cache Control Register (CACR)

 

 

 

0x004

 

Access Control Register (ACR0)

 

 

 

0x005

 

Access Control Register (ACR1)

 

 

 

0x800

 

Other Stack Pointer (OTHER_A7)

 

 

 

0x801

 

Vector Base Register (VBR)

 

 

 

0x804

 

MAC Status Register (MACSR)

 

 

 

0x805

 

MAC Mask Register (MASK)

 

 

 

0x806

 

MAC Accumulator 0 (ACC0)

 

 

 

0x807

 

MAC Accumulator 0,1 Extension Bytes (ACCEXT01)

 

 

 

0x808

 

MAC Accumulator 2,3 Extension Bytes (ACCEXT23)

 

 

 

0x809

 

MAC Accumulator 1 (ACC1)

 

 

 

0x80A

 

MAC Accumulator 2 (ACC2)

 

 

 

0x80B

 

MAC Accumulator 3 (ACC3)

 

 

 

0x80E

 

Status Register (SR)

 

 

 

0x80F

 

Program Register (PC)

 

 

 

0xC04

 

Flash Base Address Register 0 (FLASHBAR)

 

 

 

0xC05

 

RAM Base Address Register (RAMBAR)

 

 

 

29-32

MCF5282 User’s Manual

MOTOROLA

Page 704
Image 704
Motorola MCF5282, MCF5281 user manual Read Control Register Rcreg, Rc encoding, Control Register Map