Motorola MCF5282, MCF5281 user manual DMA Registers

Table A-3. Register Memory Map (Continued)

Address	Name	Mnemonic	Size
IPSBAR + 0x098	Chip Select Address Register 2	CSAR2	16
IPSBAR + 0x09C	Chip Select Mask Register 2	CSMR2	32
IPSBAR + 0x0A2	Chip Select Control Register 2	CSCR2	16
IPSBAR + 0x0A4	Chip Select Address Register 2	CSAR3	16
IPSBAR + 0x0A8	Chip Select Mask Register 3	CSMR3	32
IPSBAR + 0x0AE	Chip Select Control Register 3	CSCR3	16
IPSBAR + 0x0B0	Chip Select Address Register 4	CSAR4	16
IPSBAR + 0x0B4	Chip Select Mask Register 4	CSMR4	32
IPSBAR + 0x0BA	Chip Select Control Register 4	CSCR4	16
IPSBAR + 0x0BC	Chip Select Address Register 5	CSAR5	16
IPSBAR + 0x0C0	Chip Select Mask Register 5	CSMR5	32
IPSBAR + 0x0C6	Chip Select Control Register 5	CSCR5	16
IPSBAR + 0x0C8	Chip Select Address Register 6	CSAR6	16
IPSBAR + 0x0CC	Chip Select Mask Register 6	CSMR6	32
IPSBAR + 0x0D2	Chip Select Control Register 6	CSCR6	16
	DMA Registers
IPSBAR + 0x100	Source Address Register 0	SAR0	32
IPSBAR + 0x104	Destination Address Register 0	DAR0	32
IPSBAR + 0x108	DMA Control Register 0	DCR0	32
IPSBAR + 0x10C	Byte Count Register 0	BCR01	32
IPSBAR + 0x110	DMA Status Register 0	DSR0	8
IPSBAR + 0x140	Source Address Register 1	SAR1	32
IPSBAR + 0x144	Destination Address Register 1	DAR1	32
IPSBAR + 0x148	DMA Control Register 1	DCR1	32
IPSBAR + 0x14C	Byte Count Register 1	BCR11	32
IPSBAR + 0x150	DMA Status Register 1	DSR1	8
IPSBAR + 0x180	Source Address Register 2	SAR2	32
IPSBAR + 0x184	Destination Address Register 2	DAR2	32
IPSBAR + 0x188	DMA Control Register 2	DCR2	32
IPSBAR + 0x18C	Byte Count Register 2	BCR21	32
IPSBAR + 0x190	DMA Status Register 2	DSR2	8
IPSBAR + 0x1C0	Source Address Register 3	SAR3	32
IPSBAR + 0x1C4	Destination Address Register 3	DAR3	32
IPSBAR + 0x1C8	DMA Control Register 3	DCR3	32
IPSBAR + 0x1CC	Byte Count Register 3	BCR31	32

A-4 MCF5282 User’s Manual MOTOROLA