Motorola MCF5281, MCF5282 DMA Timer Reference Registers DTRRn, DMA Timer Capture Registers DTCRn

DMA Timer Programming Model

Table 21-4describes the DTERn fields.

			Table 21-4. DTERn Field Descriptions
Bits	Name		Description
7–2	—	Reserved, should be cleared.
1	REF	Output reference event. The counter value, DTCNn equals the reference value, DTRRn. Writing a one to REF
		clears the event condition. Writing a zero has no effect.
		If REF = 1 and DTMRn[ORRI], DTXMRn[DMAEN]
		00 No DMA request or interrupt asserted
		01 No DMA request or interrupt asserted
		10	Assert an interrupt
		11 Assert a DMA request
0	CAP	Capture event. The counter value has been latched into DTCRn. Writing a one to CAP clears the event condition.
		Writing a zero has no effect.
		If CAP = 1 and DTMRn[CE], DTXMRn[DMAEN]
		000	Disable capture event output
		001	Disable capture event output
		010	Capture on rising edge only and issue an interrupt
		011 Capture on rising edge only and issue a DMA request
		100	Capture on falling edge only and issue an interrupt
		101	Capture on falling edge only and issue a DMA request
		110 Capture on any edge and issue an interrupt
		111 Capture on any edge and issue a DMA request

21.2.9 DMA Timer Reference Registers (DTRRn)

Each DTRRn, shown in Figure 21-5,contains the reference value compared with the respective free-running timer counter (DTCNn) as part of the output-compare function. The reference value is not matched until DTCNn equals DTRRn.

=

Field

Reset

R/W

Address

31 0

REF

1111_1111_1111_1111_1111_1111_1111_1111

R/W

IPSBAR + 0x404 (DTRR0);+ 0x444 (DTRR1); + 0x484 (DTRR2); + 0x4C4 (DTRR3)

Figure 21-5. DTRRn Bit Definitions

21.2.10 DMA Timer Capture Registers (DTCRn)

Each DTCRn, shown in Figure 21-6,latches the corresponding DTCNn value during a capture operation when an edge occurs on DTINn, as programmed in DTMRn. The system clock is assumed to be the clock source. DTINn cannot simultaneously function as a clocking source and as an input capture pin. Indeterminate operation will result if DTINn is set as the clock source when the input capture mode is used.

MOTOROLA Chapter 21. DMA Timers (DTIM0–DTIM3) 21-7