Motorola MCF5281 user manual MCF5282 Signal Description, Sdram Controller Signals

Overview

Table 14-1lists the MCF5282 signals grouped by functionality.

NOTE:

The primary functionality of a pin is not necessarily its default functionality. Pins that are muxed with GPIO will default to their GPIO functionality.

Table 14-1. MCF5282 Signal Description

Signal Name		Abbreviation		Function	I/O	Page
			External Memory Interface
Address	A[23:0]			Define the address of external byte,	I/O	14-18
				word, longword, and 16-byte burst
				accesses.
Data	D[31:0]			Data bus. Provide the general	I/O	14-18
				purpose data path between the MCU
				and all other devices.
Byte strobes				Define the byte lane of data on the	I/O	14-19
	BS[3:0]
				data bus.
Output enable				Indicates when an external device can	O	14-19
	OE
				drive data on the bus.
Transfer acknowledge				Indicates that the external data	I	14-19
	TA
				transfer is complete and should be
				asserted for one clock.
Transfer error				Indicates that an error condition exists	I	14-19
	TEA
acknowledge				for the bus transfer.
Read/Write				Indicates the direction of the data	I/O	14-19
	R/W
				transfer on the bus.
Transfer size	SIZ[1:0]			Specify the data access size of the	O	14-19
				current external bus reference.
Transfer start				Asserted during the first CLKOUT	O	14-20
	TS
				cycle of a transfer when address and
				attributes are valid.
Transfer in progress				Asserted to indicate that a bus	O	14-20
	TIP
				transfer is in progress. Negated during
				idle bus cycles.
Chip selects				Programmed for a base address	O	14-20
	CS[6:0]
				location and for masking addresses,
				port size and burst capability
				indication, wait state generation, and
				internal/external termination.
			SDRAM Controller Signals
SDRAM row				SDRAM synchronous row address	O	14-21
	SRAS
address strobe				strobe.
SDRAM column				SDRAM synchronous column address	O	14-21
	SCAS
address strobe				strobe.

MOTOROLA Chapter 14. Signal Descriptions 14-3