Memory Map and Registers

Table 28-3. RCR Field Descriptions (continued)

Bit(s)

Name

 

Description

 

 

 

4

LVDF

LVD flag. Indicates the low-voltage detect status if LVDE is set. Write a 1 to clear the LVDF bit.

 

 

1

Low voltage has been detected

 

 

0

Low voltage has not been detected

 

 

NOTE: The setting of this flag causes an LVD interrupt if LVDE and LVDIE bits are set and

 

 

LVDRE is cleared when the supply voltage VDD drops below VDD (minimum). The vector for

 

 

this interrupt is shared with INT0 of the EPORT module. Interrupt arbitration in the interrupt

 

 

service routine is necessary if both of these interrupts are enabled. Also, LVDF is not cleared

 

 

at reset, however it will always initialize to a zero since the part will not come out of reset while

 

 

in a low-power state (LVDE/LVDRE bits are enabled out of reset).

 

 

 

3

LVDIE

LVD interrupt enable. Controls the LVD interrupt if LVDE is set. This bit has no effect if the

 

 

LVDE bit is a logic 0.

 

 

1

LVD interrupt enabled

 

 

0

LVD interrupt disabled

 

 

 

2

LVDRE

LVD reset enable. Controls the LVD reset if LVDE is set. This bit has no effect if the LVDE bit

 

 

is a logic 0. LVD reset has priority over LVD interrupt, if both are enabled.

 

 

1

LVD reset enabled

 

 

0

LVD reset disabled

 

 

 

1

Reserved, should be cleared.

 

 

 

0

LVDE

Controls whether the LVD is enabled.

 

 

1

LVD is enabled

 

 

0

LVD is disabled

 

 

 

 

28.4.2 Reset Status Register (RSR)

The RSR contains a status bit for every reset source. When reset is entered, the cause of the reset condition is latched along with a value of 0 for the other reset sources that were not pending at the time of the reset condition. These values are then reflected in RSR. One or more status bits may be set at the same time. The cause of any subsequent reset is also recorded in the register, overwriting status from the previous reset condition.

RSR can be read at any time. Writing to RSR has no effect.

Field

Reset

R/W

Address

7

6

5

4

3

2

1

0

LVD

SOFT

WDR

POR

EXT

LOC

LOL

 

 

 

 

 

 

 

 

Reset Dependent

R

IPSBAR + 0x11_0001

Figure 28-3. Reset Status Register (RSR)

28-4

MCF5282 User’s Manual

MOTOROLA

Page 664
Image 664
Motorola MCF5282, MCF5281 user manual Reset Status Register RSR, Lvdf, Lvdie, Soft WDR POR, Loc Lol