Liv

Revision History

Table iii. Revision History

Revision

Date of

Substantive Changes

Section/Page

Number

Release

Changed value in “Divide by” block to 8192.

Figure 18-1/18-2

Multiplied all system clock divisor values in PRE field description by 2.

Table 19-3/19-4

Changed equation in text to the following:

19.6.3/19-7

Timeout period = PRE[3:0] ⋅ (PM[15:0] + 1) ⋅ system clock ⎟ 2

In “UISR Field” row, changed bit 6 to a reserved bit.

Figure 23-12/23-14

Changed bit 6 to a reserved bit.

Table 23-9/23-14

Changed equation in PRES_DIV field description to the following:

Table 25-12/25-25

fSYS

S-clock = ------------------------------------------

2(PRESDIV + 1)

Added “Note: When Flash security is enabled, the chip will boot in

30.6.2/30-10

single chip mode regardless of the external reset configuration.”

Changed equation in QPR field description to the following:

Table 27-4/27-12

fQCLK =

fSYS

2(QPR[6:0] + 1)

Multiplied all fSYS divisor values in this table by 2.

Table 27-5/27-13

Added “Note: Enabling Flash security will disable BDM communications.”

29.1/29-1

Replaced

with “SCKE.”

Figure 32-1/32-2

“SCKE”

Replaced “PEL2” with “PEL6, ” “PNQ6” with “PNQ7,” “PNQ5” with

Table 32-1/32-3

“PNQ6,” “PEL5” with “PEL1,” “PNQ4” with “PNQ5,” “PNQ3” with

“PNQ4,” “PNQ2” with “PNQ3,” “PNQ1” with “PNQ2,” “PNQ0” with

“PNQ1,” “PQS0” with “PQS1,” “PQS1” with “PQS0,” “PJ6” with “PJ7,”

with

“RAS0”

“SDRAM_CS0,” “RAS1” with “SDRAM_CS1,” and “SCKE”

with “SCKE.”

Changed value for “ESD Target for Human Body Model” to “2000” and

Table 33-1/33-1

“ESD Target for Machine Model” to “200.”

Changed value in “Maximum number of guaranteed program/erase cycles

Table 33-9/33-10

before failure” row to “10,000.”

Changed the max value in specs B6a–B6c to “0.5tCYC + 10.”

Table 33-11/33-11

Changed the min value in spec B7a to “0.5tCYC + 2” and reflected the change

Table 33-11/33-11

in Figure 33-2, Figure 33-3,and Figure 33-4.

Figure 33-2/33-13

Figure 33-3/33-14

Figure 33-4/33-15

Changed the min value in spec D8 to “2” and the max value to”'—”.

Table 33-12/33-16

Changed the max value in spec G1a to “12.”

Table 33-13/33-17

Added the following footnote: “Because of long delays associated with the

Table 33-13/33-17

PQA/PQB pads, signals on the PQA/PQB pins will be updated on the

following edge of the clock.”

Added timing diagrams and tables to Section 33.12, “Fast Ethernet AC

33.12/33-20

Timing Specifications.”

Changed the max value in spec 1 to “1/4.”

Table 33-23/33-25

MCF5282 User’s Manual

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Motorola MCF5282, MCF5281 user manual Liv

Models: MCF5282 MCF5281