Motorola MCF5281, MCF5282 user manual Fast Termination Cycles, Read Cycle with Fast Termination

Data Transfer Operation

13.4.5 Fast Termination Cycles

Two clock cycle transfers are supported on the MCF5282 bus. In most cases, this is impractical to use in a system because the termination must take place in the same half-clock during which TS is asserted. As this is atypical, it is not referred to as the zero-wait-state case but is called the fast-termination case. Fast termination cycles occur when the external device or memory asserts TA less than one clock after TS is asserted. This means that the MCF5282 samples TA on the rising edge of the second cycle of the bus transfer. Figure 13-9shows a read cycle with fast termination. Note that fast termination cannot be used with internal termination.

S0	S1	S4	S5
CLKOUT
A[31:0], SIZ[1:0]
R/W
TIP
TS
CSn, BSn, OE
D[31:0]	Read
TA

Figure 13-9. Read Cycle with Fast Termination

Figure 13-10shows a write cycle with fast termination.

S0	S1	S4	S5
CLKOUT
A[31:0], SIZ[1:0]
R/W
TIP
TS
CSn, BSn
D[31:0]			Write
TA

Figure 13-10. Write Cycle with Fast Termination

MOTOROLA Chapter 13. External Interface Module (EIM) 13-9