Programming Model

31

15

7

0

 

 

 

 

 

 

AATR

Address attribute trigger register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

ABLR

Address low breakpoint register

 

 

 

 

 

 

 

 

ABHR

Address high breakpoint register

31

15

 

0

 

 

 

 

 

 

CSR

Configuration/status register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

DBR

Data breakpoint register

 

 

 

 

 

 

 

 

DBMR

Data breakpoint mask register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

PBR

PC breakpoint register

 

 

 

 

 

 

 

 

PBMR

PC breakpoint mask register

31

15

 

0

 

 

 

 

 

 

TDR

Trigger definition register

 

 

 

 

Note: Each debug register is accessed as a 32-bit register; shaded fields above are not used (don’t care).

All debug control registers are writable from the external development system or the CPU via the WDEBUG instruction. CSR is write-only from the programming model. It can be read or written through the BDM port using the RDMREG and WDMREG commands.

31

15

7

0

 

 

 

 

 

 

AATR

Address attribute trigger register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

ABLR

Address low breakpoint register

 

 

 

 

 

 

 

 

ABHR

Address high breakpoint register

31

15

7

0

 

 

 

 

 

 

BAAR

BDM address attribute register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

CSR

Configuration/status register

 

 

 

 

31

15

 

0

 

 

 

 

 

 

DBR

Data breakpoint register

 

 

 

 

 

 

 

 

DBMR

Data breakpoint mask register

31

15

 

0

 

 

 

 

 

 

PBR

PC breakpoint register

 

 

 

 

 

 

 

 

PBMR

PC breakpoint mask register

31

15

 

0

 

 

 

 

 

 

TDR

Trigger definition register

 

 

 

 

Note: Each debug register is accessed as a 32-bit register; shaded fields above are not used (don’t care).

All debug control registers are writable from the external development system or the CPU via the WDEBUG instruction.

CSR is write-only from the programming model. It can be read or written through the BDM port using the RDMREG and WDMREG commands.

Figure 29-4. Debug Programming Model

These registers are accessed through the BDM port by the commands, WDMREG and RDMREG, described in Section 29.5.3.3, “Command Set Descriptions.” These commands contain a 5-bit field, DRc, that specifies the register, as shown in Table 29-3.

29-6

MCF5282 User’s Manual

MOTOROLA

Page 678
Image 678
Motorola MCF5282, MCF5281 user manual Aatr, Ablr, Abhr, Csr, Dbr, Dbmr, Pbr, Pbmr, Tdr, Baar