Signal Connection Considerations

27.9.7 Analog Input Pins

Analog inputs should have low AC impedance at the pins. Low AC impedance can be realized by placing a capacitor with good high frequency characteristics at the input signal of the device. Ideally, that capacitor should be as large as possible (within the practical range of capacitors that still have good high-frequency characteristics). This capacitor has two effects:

It helps attenuate any noise that may exist on the input.

It sources charge during the sample period when the analog signal source is a high-impedance source.

Series resistance can be used with the capacitor on an input signal to implement a simple RC filter. The maximum level of filtering at the input pins is application dependent and is based on the bandpass characteristics required to accurately track the dynamic characteristics of an input. Simple RC filtering at the pin may be limited by the source impedance of the transducer or circuit supplying the analog signal to be measured. (See Section 27.9.7.2.”) In some cases, the size of the capacitor at the pin may be very small.

Figure 27-53is a simplified model of an input channel. Refer to this model in the following discussion of the interaction between the external circuitry and the circuitry inside the QADC.

Source

RSRC

VSRC

External Filter

RF

CF

Internal Circuit Model

 

 

 

 

 

 

 

S1

 

 

S2

 

 

 

S3

 

 

 

 

 

 

 

 

 

AMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CSAMP

 

 

 

 

 

 

 

CP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VI

VSRC = Source Voltage

RF = Filter Impedance

CP = Internal Parasitic Capacitance

RSRC = Source Impedance

CF = Filter Capacitor

CSAMP = Sample Capacitor

 

 

VI = Internal Voltage Source During Sample and Hold

Figure 27-53. Electrical Model of an A/D Input Signal

In Figure 27-53,RF, RSRC, and CF comprise the external filter circuit. CP is the internal parasitic capacitor. CSAMP is the capacitor array used to sample and hold the input voltage. VI is an internal voltage source used to provide charge to CSAMP during sample phase.

The following paragraphs provide a simplified description of the interaction between the QADC and the user's external circuitry. This circuitry is assumed to be a simple RC low-pass filter passing a signal from a source to the QADC input signal. These paragraphs make the following assumptions:

MOTOROLA

Chapter 27. Queued Analog-to-Digital Converter (QADC)

27-73

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Motorola MCF5281, MCF5282 user manual Analog Input Pins, Electrical Model of an A/D Input Signal