TABLES

 

Table

Title

Page

Number

Number

 

6-5

CFMCLKD Field Descriptions

6-10

6-6

CFMSEC Field Descriptions

6-11

6-7

CFMPROT Field Descriptions

6-12

6-8

CFMSACC Field Descriptions

6-14

6-9

CFMDACC Field Descriptions

6-14

6-10

CFMUSTAT Field Descriptions

6-15

6-11

CFMCMD Field Descriptions

6-16

6-12

CFMCMD User Mode Commands

6-16

6-13

Flash User Commands

6-20

6-14

CFM Interrupt Sources

6-25

7-1

Chip Configuration Module Memory Map

7-2

7-2

LPICR Field Description

7-3

7-3

XLPM_IPL Settings

7-4

7-4

LPCR Field Descriptions

7-4

7-5

Low-Power Modes

7-5

7-6

PLL/CLKOUT Stop Mode Operation

7-5

7-7

CPU and Peripherals in Low-Power Modes

7-16

8-1

SCM Register Map

8-2

8-2

IPSBAR Field Description

8-4

8-3

RAMBAR Field Description

8-5

8-4

CRSR Field Descriptions

8-6

8-5

CWCR Field Description

8-8

8-6

Core Watchdog Timer Delay

8-8

8-7

MPARK Field Description

8-13

8-8

SACU Register Memory Map

8-15

8-9

MPR[n] Field Descriptions

8-16

8-10

PACR Field Descriptions

8-17

8-11

PACR ACCESSCTRL Bit Encodings

8-17

8-12

Peripheral Access Control Registers (PACRs)

8-17

8-13

Grouped PeripheralAccess Control Register (GPACR) Field Descriptions

8-19

8-14

GPACR ACCESS_CTRL Bit Encodings

8-19

8-15

GPACR Address Space

8-20

9-1

Clock Module Operation in Low-power Modes

9-2

9-2

Signal Properties

9-4

9-3

Clock Module Memory Map

9-5

9-4

SYNCR Field Descriptions

9-6

9-5

SYNSR Field Descriptions

9-9

9-6

System Clock Modes

9-10

9-7

Clock Out and Clock In Relationships

9-11

9-8

Charge Pump Current and MFD in Normal Mode Operation

9-13

9-9

Loss of Clock Summary

9-16

9-10

Stop Mode Operation

9-17

10-1

Interrupt Priority Within a Level

10-3

 

 

 

xxxiv

MCF5282 User’s Manual

MOTOROLA

Page 34
Image 34
Motorola MCF5282, MCF5281 user manual Charge Pump Current and MFD in Normal Mode Operation