NEC 2400IMX system manual Ram, SW3

PA-CP54 (CPU)

SWITCH	SWITCH NO.	SETTING		STANDARD		MEANING
NAME				SETTING
	1		SW2-1	SW2-2		SETTING OF EPROM
			ON	ON	When equipping 1M bit EPROM IC.
			ON	OFF	When equipping 2M bit EPROM IC (standard).
			OFF	ON	When equipping 4M bit EPROM IC.
	2
			OFF	OFF	Not used
	3		ON	⋅		When equipping 1M bit SRAM IC.
			OFF			When equipping 256 K bit SRAM IC.
	4		SW2-4	SW2-5		SETTING OF ROM AREAS
			ON	ON	When providing 1MB of F00000H ~ FFFFFFH.
			OFF	ON	When providing 2MB of F00000H ~ FFFFFFH and 00000H ~
SW2					0FFFFFH (standard setting).
	5		OFF	OFF	When providing 4MB of F00000H ~ FFFFFFH and 00000H ~
					2FFFFFH.
			ON	⋅		When providing EE0000H ~ EFFFFFH and
						E00000H ~ E3FFFFH as RAM areas.
	6
			OFF			When providing EE0000H ~ EFFFFFH as
						RAM area.
			ON	⋅		When equipping 256 kbit SRAM IC as parity
						RAM.
	7
			OFF			When equipping 64 kbit SRAM IC as parity
						RAM.
	8		ON			Test mode (Always mis-hit state).
			OFF	⋅		Normal operation mode.
	1		OFF	⋅		Fixed.
			ON			When equipping 64 kbit SRAM IC as parity
						RAM.
	2
			OFF	⋅		When equipping 256 kbit SRAM IC as parity
						RAM.
SW3			ON	⋅		When equipping EPROM IC of either 1M bit
	3					2M bit.
			OFF			When equipping EPROM IC of 4M bit.
			ON	⋅		When equipping EPROM IC of either 1M bit
						2M bit as parity ROM.
	4
			OFF			When equipping EPROM IC of 4M bit as pari-
						ty ROM.

CHAPTER 4 NDA-24282

Page 76

Revision 1.0