Renesas SH7781 - page 1020

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 990 of 1658
REJ09B0261-0100
20.3.12 CL Command FIFO (CLCF)
CLCF is in the CL register block and receives commands. This register uses the FIFO method and
recognizes four command parameters according to the writing order. This register does not retain
the written values. This register is always read as 0.
161718192021222324252627282931 30
0000000000000000
CL_CF
WWWWWWWWWWWWWWWW
BIt:
Initial value:
R/W:
01234567891011121315 14
0000000000000000
CL_CF
WWWWWWWWWWWWWWWW
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 CL_CF 0 W Command FIFO register
Notes: 1. Setting Method
When accessing this register, the CL_EN bit in GACER should be set to 1. Access is
possible only when the CL_EN bit is set to 1. If the CL_EN bit is 0, access is invalid
(writing is invalid; the result of reading is indefinite).
The following shows the parameter contents assumed according to the writing order:
Writing Order Setting Contents
CL command parameter 1 Input Y pointer
CL command parameter 2 Input U pointer
CL command parameter 3 Input V pointer CL command
CL command parameter 4 Output pointer
• Input Y pointer: Pointer for input Y data (Input Y data storing address)
• Input U pointer: Pointer for input U data (Input U data storing address)
• Input V pointer: Pointer for input V data (Input V data storing address)
• Output pointer: Pointer for output data (Output data storing address)