13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 572 of 1658
REJ09B0261-0100
(10) PCI Latency Timer Register (PCILTM)
01234567
00000000
LTM
R/WR/WR/WR/WR/WR/WR/WR/W
Bit:
Initial value:
SH R/W:
R/WR/WR/WR/WR/WR/WR/WR/WPCI R/W:
Bit Bit Name
Initial
Value R/W Description
7 to 0 LTM H'00 SH: R/W
PCI: R/W
Latency Timer Register
These bits specify the maximum time that the PCI bus
is occupied with the clock cycle when the PCIC is a
master.
(11) PCI Header Type Register (PCIHDR)
RRRRRRRRPCI R/W:
01234567
00000000
HDR
MFE
RRRRRRRR
Bit:
Initial value:
SH R/W:
Bit Bit Name
Initial
Value R/W Description
7 MFE 0 SH: R
PCI: R
Multiple Function Enable (HEAD7)
Indicates whether the device is multi-function or
single-function
0: Single function device
1: The device has two to eight multifunction devices
(not supported)
6 to 0 HDR H'00 SH: R
PCI: R
Configuration Layout Type (HEAD6 to HEAD0)
These bits indicate the layout type of configuration
registers.
H'00: Type 00h layout supported
H'01: Type 01h layout supported (not supported)