10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 313 of 1658
REJ09B0261-0100
Bit
Initial
Value R/W Source Function Description
18 0 R/W PCIC (4) Clears the PCIINTD interrupt
masking
17 0 R/W PCIC (3) Clears the PCIINTC interrupt
masking
16 0 R/W PCIC (2) Clears the PCIINTB interrupt
masking
15 0 R/W PCIC (1) Clears the PCIINTA interrupt
masking
14 0 R/W PCIC (0) Clears the PCISERR interrupt
masking
13 0 R/W HAC channel 1 Clears the HAC channel 1 interrupt
masking
12 0 R/W HAC channel 0 Clears the HAC channel 0 interrupt
masking
11 0 R/W DMAC (1) Clears DMAC channels 6 to 11
interrupt masking and address
error interrupt
10 0 R/W DMAC (0) Clears DMAC channels 0 to 5
interrupt masking and address
error interrupt
9 0 R/W H-UDI Clears H-UDI interrupt masking
8 0 R/W WDT Clears the WDT interrupt masking
Clears interrupt
masking for each on-
chip peripheral module
[When written]
0: Invalid
1: Clears interrupt
masking
[When read]
Always 0
7 0 R/W SCIF channel 5 Clears SCIF channel 5 interru pt
masking
6 0 R/W SCIF channel 4 Clears SCIF channel 4 interru pt
masking
5 0 R/W SCIF channel 3 Clears SCIF channel 3 interru pt
masking
4 0 R/W SCIF channel 2 Clears SCIF channel 2 interru pt
masking
3 0 R/W SCIF channel 1 Clears SCIF channel 1 interru pt
masking
2 0 R/W SCIF channel 0 Clears SCIF channel 0 interru pt
masking
1 0 R/W TMU channels
3 to 5
Clears TMU channel 3 to 5
interrupt masking
0 0 R/W TMU channels
0 to 2
Clears TMU channel 0 to 2
interrupt masking