18. Timer Unit (TMU)
Rev.1.00 Jan. 10, 2008 Page 803 of 1658
REJ09B0261-0100
Table 18.3 Register Configuration (2)
Channel Register Name Abbrev.
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
Manual Reset
by WDT/
Multiple
Exceptions
Sleep by
SLEEP
Instruction
Module
Standby
Common
to 0, 1, 2
Timer start register 0 TSTR0 H'00 H'00 Retained Retained
Timer constant register 0 TCOR0 H'FFFF FFFF H'FFFF F FFF Retained Retained
Timer counter 0 TCNT0 H'FFFF FFFF H'FFFF FFFF Retained Retained
0
Timer control register 0 TCR0 H'0000 H'0000 Retained Retained
Timer constant register 1 TCOR1 H'FFFF FFFF H'FFFF F FFF Retained Retained
Timer counter 1 TCNT1 H'FFFF FFFF H'FFFF FFFF Retained Retained
1
Timer control register 1 TCR1 H'0000 H'0000 Retained Retained
Timer constant register 2 TCOR2 H'FFFF FFFF H'FFFF F FFF Retained Retained
Timer counter 2 TCNT2 H'FFFF FFFF H'FFFF FFFF Retained Retained
Timer control register 2 TCR2 H'0000 H'0000 Retained Retained
2
Input capture register 2 TCPR2 Retained Retained Retained Retained
Common
to 3, 4, 5
Timer start register 1 TSTR1 H'00 H'00 Retained Retained
Timer constant register3 TCOR3 H'FFFF FFFF H'FFFF FFFF Retained Retained
Timer counter 3 TCNT3 H'FFFF FFFF H'FFFF FFFF Retained Retained
3
Timer control register 3 TCR3 H'0000 H'0000 Retained Retained
Timer constant register 4 TCOR4 H'FFFF FFFF H'FFFF F FFF Retained Retained
Timer counter 4 TCNT4 H'FFFF FFFF H'FFFF FFFF Retained Retained
4
Timer control register 4 TCR4 H'0000 H'0000 Retained Retained
5 Timer constant register 5 TCOR5 H'FFFF FFFF H'FFFF FFFF Retained Retained
Timer counter 5 TCNT5 H'FFFF FFFF H'FFFF FFFF Retained Retained
Timer control register 5 TCR5 H'0000 H'0000 Retained Retained