32. Electrical Characteristics
Rev.1.00 Jan. 10, 2008 Page 1625 of 1658
REJ09B0261-0100
tEXHLW
tEXHHW
tEXVHW
tOD1 tOD2
IRDY/HSYNC
(Input)
IRDY/HSYNC
(Input)
LOCK/ODDF
(Input)
Figure 32.75 Display Timing in TV Synchronous Mode
32.4 AC Characteristic Test Conditions
The AC characteristic test conditions are as follows.
DDR pin only
Input/output signal reference level
MDQS: /MDQS cross point
MCK: /MCK cross point
Other than above: VDDQ-DDR/2
Input pulse level: VSSQ to VDDQ-DDR
Input rise/fall time: 0.25 ns
Other pins
Input/output signal reference level: VDDQ/2
Input pulse level: VSSQ to VDDQ
Input rise/fall time: 1 ns